[Mesa-dev] [PATCH 09/12] panfrost: Support linear depth buffers

[Alyssa Rosenzweig]

Previously, only AFBC depth buffers were supported for writing; a
linear pseudo-depth-buffer was attached when clearing DEPTH but in
practice this was not actually used. Nevertheless, the hardware does
support honest-to-goodness linear depth buffers, which might be useful
at some point. If nothing else, having this implemented helps with
understanding the hardware, bringing to light some magic bits.

Signed-off-by: Alyssa Rosenzweig <alyssa at rosenzweig.io>
---
 src/gallium/drivers/panfrost/pan_context.c | 30 +++++++++++++---------
 1 file changed, 18 insertions(+), 12 deletions(-)

diff --git a/src/gallium/drivers/panfrost/pan_context.c b/src/gallium/drivers/panfrost/pan_context.c
index 099d6d0389b..37f6ce4910f 100644
--- a/src/gallium/drivers/panfrost/pan_context.c
+++ b/src/gallium/drivers/panfrost/pan_context.c
@@ -246,6 +246,9 @@ panfrost_set_fragment_target_zsbuf(
 {
         struct panfrost_resource *rsrc = pan_resource(surf->texture);
 
+        unsigned stride =
+                util_format_get_stride(surf->format, surf->texture->width0);
+
         if (rsrc->bo->layout == PAN_AFBC) {
                 /* TODO: AFBC on SFBD */
                 assert(!require_sfbd);
@@ -260,16 +263,27 @@ panfrost_set_fragment_target_zsbuf(
                 ctx->fragment_extra.ds_afbc.zero1 = 0x10009;
                 ctx->fragment_extra.ds_afbc.padding = 0x1000;
 
-                /* There's a general 0x400 in all versions of this field scene.
+                /* There's a general 0x400 in all versions of this field seen.
                  * ORed with 0x5 for depth/stencil. ORed 0x10 for AFBC encoded
-                 * depth stencil. It's unclear where the remaining 0x20 bit is
-                 * from */
+                 * depth stencil -- er, no. It's unclear where the remaining 0x20 bit
+                 * is from, checksumming maybe? */
 
                 ctx->fragment_extra.unk = 0x400 | 0x20 | 0x10 | 0x5;
 
                 ctx->fragment_mfbd.unk3 |= 0x400;
         } else if (rsrc->bo->layout == PAN_LINEAR) {
-                /* TODO */
+                /* TODO: explicit depth on SFBD */
+                assert(!require_sfbd);
+
+                /* Setup combined 24/8 depth/stencil */
+                ctx->fragment_mfbd.unk3 |= MALI_MFBD_EXTRA;
+
+                ctx->fragment_extra.unk = 0x404;
+                ctx->fragment_extra.ds_linear.depth = rsrc->bo->gpu[0];
+                ctx->fragment_extra.ds_linear.depth_stride = stride;
+
+                /* Seemingly means "write to depth buffer" */
+                ctx->fragment_mfbd.unk3 |= 0x400;
         } else {
                 fprintf(stderr, "Invalid render layout (zsbuf)");
                 assert(0);
@@ -525,14 +539,6 @@ panfrost_clear_mfbd(struct panfrost_job *job)
         if (job->clear & PIPE_CLEAR_STENCIL) {
                 buffer_ds->clear_stencil = job->clear_stencil;
         }
-
-        if (job->clear & (PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL)) {
-                /* Setup combined 24/8 depth/stencil */
-                ctx->fragment_mfbd.unk3 |= MALI_MFBD_EXTRA;
-                ctx->fragment_extra.unk = 0x405;
-                ctx->fragment_extra.ds_linear.depth = ctx->depth_stencil_buffer.gpu;
-                ctx->fragment_extra.ds_linear.depth_stride = ctx->pipe_framebuffer.width * 4;
-        }
 }
 
 static void
-- 
2.20.1