[Mesa-dev] [PATCH v3 05/11] ac/nir: use new LLVM 8 intrinsics for SSBO atomic operations

Samuel Pitoiset samuel.pitoiset at gmail.com
Wed Mar 13 16:41:00 UTC 2019


Use the raw version (ie. IDXEN=0) because vindex is unused.

v2: - use raw version

Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
---
 src/amd/common/ac_nir_to_llvm.c | 66 +++++++++++++++++++++------------
 1 file changed, 42 insertions(+), 24 deletions(-)

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 247bd20a7ea..7f63b506b93 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -1626,57 +1626,75 @@ static void visit_store_ssbo(struct ac_nir_context *ctx,
 static LLVMValueRef visit_atomic_ssbo(struct ac_nir_context *ctx,
                                       const nir_intrinsic_instr *instr)
 {
-	const char *name;
-	LLVMValueRef params[6];
+	const char *atomic_name;
+	char intrinsic_name[64];
+	LLVMValueRef params[7];
 	int arg_count = 0;
-
-	if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap) {
-		params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[3]), 0);
-	}
-	params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
-	params[arg_count++] = ctx->abi->load_ssbo(ctx->abi,
-						 get_src(ctx, instr->src[0]),
-						 true);
-	params[arg_count++] = ctx->ac.i32_0; /* vindex */
-	params[arg_count++] = get_src(ctx, instr->src[1]);      /* voffset */
-	params[arg_count++] = ctx->ac.i1false;  /* slc */
+	int length;
 
 	switch (instr->intrinsic) {
 	case nir_intrinsic_ssbo_atomic_add:
-		name = "llvm.amdgcn.buffer.atomic.add";
+		atomic_name = "add";
 		break;
 	case nir_intrinsic_ssbo_atomic_imin:
-		name = "llvm.amdgcn.buffer.atomic.smin";
+		atomic_name = "smin";
 		break;
 	case nir_intrinsic_ssbo_atomic_umin:
-		name = "llvm.amdgcn.buffer.atomic.umin";
+		atomic_name = "umin";
 		break;
 	case nir_intrinsic_ssbo_atomic_imax:
-		name = "llvm.amdgcn.buffer.atomic.smax";
+		atomic_name = "smax";
 		break;
 	case nir_intrinsic_ssbo_atomic_umax:
-		name = "llvm.amdgcn.buffer.atomic.umax";
+		atomic_name = "umax";
 		break;
 	case nir_intrinsic_ssbo_atomic_and:
-		name = "llvm.amdgcn.buffer.atomic.and";
+		atomic_name = "and";
 		break;
 	case nir_intrinsic_ssbo_atomic_or:
-		name = "llvm.amdgcn.buffer.atomic.or";
+		atomic_name = "or";
 		break;
 	case nir_intrinsic_ssbo_atomic_xor:
-		name = "llvm.amdgcn.buffer.atomic.xor";
+		atomic_name = "xor";
 		break;
 	case nir_intrinsic_ssbo_atomic_exchange:
-		name = "llvm.amdgcn.buffer.atomic.swap";
+		atomic_name = "swap";
 		break;
 	case nir_intrinsic_ssbo_atomic_comp_swap:
-		name = "llvm.amdgcn.buffer.atomic.cmpswap";
+		atomic_name = "cmpswap";
 		break;
 	default:
 		abort();
 	}
 
-	return ac_build_intrinsic(&ctx->ac, name, ctx->ac.i32, params, arg_count, 0);
+	if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap) {
+		params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[3]), 0);
+	}
+	params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
+	params[arg_count++] = ctx->abi->load_ssbo(ctx->abi,
+						 get_src(ctx, instr->src[0]),
+						 true);
+
+	if (HAVE_LLVM >= 0x0800) {
+		params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
+		params[arg_count++] = ctx->ac.i32_0; /* soffset */
+		params[arg_count++] = ctx->ac.i32_0; /* slc */
+
+		length = snprintf(intrinsic_name, sizeof(intrinsic_name),
+			          "llvm.amdgcn.raw.buffer.atomic.%s.i32",
+				  atomic_name);
+	} else {
+		params[arg_count++] = ctx->ac.i32_0; /* vindex */
+		params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
+		params[arg_count++] = ctx->ac.i1false; /* slc */
+
+		length = snprintf(intrinsic_name, sizeof(intrinsic_name),
+			          "llvm.amdgcn.buffer.atomic.%s", atomic_name);
+	}
+
+	assert(length < sizeof(intrinsic_name));
+	return ac_build_intrinsic(&ctx->ac, intrinsic_name, ctx->ac.i32,
+				  params, arg_count, 0);
 }
 
 static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
-- 
2.21.0



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