[Mesa-dev] [PATCH] [Panfrost] [Bifrost] Add a few missing ops to disassembler

[Connor Abbott]

On Mon, May 6, 2019 at 1:26 AM <sonicadvance1 at gmail.com> wrote:
>
> From: Ryan Houdek <Sonicadvance1 at gmail.com>
>
> Adds Round, RoundEven, and the two Trunc variants to the disassembler.
> Additionally adds two control register types that were used with these
> instructions.
>
> Signed-off-by: Ryan Houdek <Sonicadvance1 at gmail.com>
> ---
>  src/gallium/drivers/panfrost/bifrost/disassemble.c | 7 +++++++
>  1 file changed, 7 insertions(+)
>
> diff --git a/src/gallium/drivers/panfrost/bifrost/disassemble.c b/src/gallium/drivers/panfrost/bifrost/disassemble.c
> index daadf257896..585f6ced107 100644
> --- a/src/gallium/drivers/panfrost/bifrost/disassemble.c
> +++ b/src/gallium/drivers/panfrost/bifrost/disassemble.c
> @@ -287,6 +287,7 @@ static struct bifrost_reg_ctrl DecodeRegCtrl(struct bifrost_regs regs)
>                  case 1:
>                          decoded.fma_write_unit = REG_WRITE_TWO;
>                          break;
> +                case 2:

New modes for something as simple as an instruction that rounds seems
highly suspicious... maybe this is the 64-bit clause mode? That has an
entirely different reg ctrl, and I haven't ported the changes needed
from SPD to Mesa yet. I also can't reproduce it myself with the
offline compiler. Can you share an example where the blob uses one of
these?

>                  case 3:
>                          decoded.fma_write_unit = REG_WRITE_TWO;
>                          decoded.read_reg3 = true;
> @@ -318,6 +319,8 @@ static struct bifrost_reg_ctrl DecodeRegCtrl(struct bifrost_regs regs)
>                          decoded.add_write_unit = REG_WRITE_TWO;
>                          decoded.clause_start = true;
>                          break;
> +
> +                case 7:
>                  case 15:
>                          decoded.fma_write_unit = REG_WRITE_THREE;
>                          decoded.add_write_unit = REG_WRITE_TWO;
> @@ -681,10 +684,13 @@ static const struct fma_op_info FMAOpInfos[] = {
>          { 0xe0bc0, "UMAX3", FMA_THREE_SRC },
>          { 0xe0c00, "IMIN3", FMA_THREE_SRC },
>          { 0xe0c40, "UMIN3", FMA_THREE_SRC },
> +        { 0xe0ec5, "ROUND", FMA_ONE_SRC },
>          { 0xe0f40, "CSEL", FMA_THREE_SRC }, // src2 != 0 ? src1 : src0
>          { 0xe0fc0, "MUX.i32", FMA_THREE_SRC }, // see ADD comment
> +        { 0xe1805, "ROUNDEVEN", FMA_ONE_SRC },
>          { 0xe1845, "CEIL", FMA_ONE_SRC },
>          { 0xe1885, "FLOOR", FMA_ONE_SRC },
> +        { 0xe18c5, "TRUNC", FMA_ONE_SRC },
>          { 0xe19b0, "ATAN_LDEXP.Y.f32", FMA_TWO_SRC },
>          { 0xe19b8, "ATAN_LDEXP.X.f32", FMA_TWO_SRC },
>          // These instructions in the FMA slot, together with LSHIFT_ADD_HIGH32.i32
> @@ -1177,6 +1183,7 @@ static const struct add_op_info add_op_infos[] = {
>          { 0x07bc5, "FLOG_FREXPE", ADD_ONE_SRC },
>          { 0x07d45, "CEIL", ADD_ONE_SRC },
>          { 0x07d85, "FLOOR", ADD_ONE_SRC },
> +        { 0x07dc5, "TRUNC", ADD_ONE_SRC },

You can add to the list:
7d05 -> roundEven

although bizarrely ROUND doesn't seem to have an ADD equivalent.

>          { 0x07f18, "LSHIFT_ADD_HIGH32.i32", ADD_TWO_SRC },
>          { 0x08000, "LD_ATTR.f16", ADD_LOAD_ATTR, true },
>          { 0x08100, "LD_ATTR.v2f16", ADD_LOAD_ATTR, true },
> --
> 2.20.1
>
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