[Mesa-dev] [PATCH 2/4] radv: clean up the sample locations codebase
Bas Nieuwenhuizen
bas at basnieuwenhuizen.nl
Tue May 21 23:59:54 UTC 2019
r-b
On Thu, May 16, 2019 at 11:50 AM Samuel Pitoiset
<samuel.pitoiset at gmail.com> wrote:
>
> Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
> ---
> src/amd/vulkan/radv_cmd_buffer.c | 2 +-
> src/amd/vulkan/radv_pipeline.c | 2 +-
> src/amd/vulkan/radv_private.h | 4 +-
> src/amd/vulkan/si_cmd_buffer.c | 166 ++++++++++++++-----------------
> 4 files changed, 76 insertions(+), 98 deletions(-)
>
> diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
> index e4e5966da54..4f592bc7f68 100644
> --- a/src/amd/vulkan/radv_cmd_buffer.c
> +++ b/src/amd/vulkan/radv_cmd_buffer.c
> @@ -669,7 +669,7 @@ radv_update_multisample_state(struct radv_cmd_buffer *cmd_buffer,
>
> radeon_set_context_reg(cmd_buffer->cs, R_028A48_PA_SC_MODE_CNTL_0, ms->pa_sc_mode_cntl_0);
>
> - radv_cayman_emit_msaa_sample_locs(cmd_buffer->cs, num_samples);
> + radv_emit_default_sample_locations(cmd_buffer->cs, num_samples);
>
> /* GFX9: Flush DFSM when the AA mode changes. */
> if (cmd_buffer->device->dfsm_allowed) {
> diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
> index c89a6f139ba..56fd65bec29 100644
> --- a/src/amd/vulkan/radv_pipeline.c
> +++ b/src/amd/vulkan/radv_pipeline.c
> @@ -1128,7 +1128,7 @@ radv_pipeline_init_multisample_state(struct radv_pipeline *pipeline,
> S_028804_MASK_EXPORT_NUM_SAMPLES(log_samples) |
> S_028804_ALPHA_TO_MASK_NUM_SAMPLES(log_samples);
> ms->pa_sc_aa_config |= S_028BE0_MSAA_NUM_SAMPLES(log_samples) |
> - S_028BE0_MAX_SAMPLE_DIST(radv_cayman_get_maxdist(log_samples)) |
> + S_028BE0_MAX_SAMPLE_DIST(radv_get_default_max_sample_dist(log_samples)) |
> S_028BE0_MSAA_EXPOSED_SAMPLES(log_samples); /* CM_R_028BE0_PA_SC_AA_CONFIG */
> ms->pa_sc_mode_cntl_1 |= S_028A4C_PS_ITER_SAMPLE(ps_iter_samples > 1);
> if (ps_iter_samples > 1)
> diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h
> index 9563e86a680..7834a505562 100644
> --- a/src/amd/vulkan/radv_private.h
> +++ b/src/amd/vulkan/radv_private.h
> @@ -1212,8 +1212,8 @@ void radv_cmd_buffer_clear_subpass(struct radv_cmd_buffer *cmd_buffer);
> void radv_cmd_buffer_resolve_subpass(struct radv_cmd_buffer *cmd_buffer);
> void radv_cmd_buffer_resolve_subpass_cs(struct radv_cmd_buffer *cmd_buffer);
> void radv_cmd_buffer_resolve_subpass_fs(struct radv_cmd_buffer *cmd_buffer);
> -void radv_cayman_emit_msaa_sample_locs(struct radeon_cmdbuf *cs, int nr_samples);
> -unsigned radv_cayman_get_maxdist(int log_samples);
> +void radv_emit_default_sample_locations(struct radeon_cmdbuf *cs, int nr_samples);
> +unsigned radv_get_default_max_sample_dist(int log_samples);
> void radv_device_init_msaa(struct radv_device *device);
>
> void radv_update_ds_clear_metadata(struct radv_cmd_buffer *cmd_buffer,
> diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c
> index b93cd88a1d1..56d7a9a3682 100644
> --- a/src/amd/vulkan/si_cmd_buffer.c
> +++ b/src/amd/vulkan/si_cmd_buffer.c
> @@ -1300,144 +1300,122 @@ void si_cp_dma_wait_for_idle(struct radv_cmd_buffer *cmd_buffer)
>
> /* For MSAA sample positions. */
> #define FILL_SREG(s0x, s0y, s1x, s1y, s2x, s2y, s3x, s3y) \
> - (((s0x) & 0xf) | (((unsigned)(s0y) & 0xf) << 4) | \
> - (((unsigned)(s1x) & 0xf) << 8) | (((unsigned)(s1y) & 0xf) << 12) | \
> - (((unsigned)(s2x) & 0xf) << 16) | (((unsigned)(s2y) & 0xf) << 20) | \
> + ((((unsigned)(s0x) & 0xf) << 0) | (((unsigned)(s0y) & 0xf) << 4) | \
> + (((unsigned)(s1x) & 0xf) << 8) | (((unsigned)(s1y) & 0xf) << 12) | \
> + (((unsigned)(s2x) & 0xf) << 16) | (((unsigned)(s2y) & 0xf) << 20) | \
> (((unsigned)(s3x) & 0xf) << 24) | (((unsigned)(s3y) & 0xf) << 28))
>
> -
> -/* 2xMSAA
> - * There are two locations (4, 4), (-4, -4). */
> -const uint32_t eg_sample_locs_2x[4] = {
> - FILL_SREG(4, 4, -4, -4, 4, 4, -4, -4),
> - FILL_SREG(4, 4, -4, -4, 4, 4, -4, -4),
> - FILL_SREG(4, 4, -4, -4, 4, 4, -4, -4),
> - FILL_SREG(4, 4, -4, -4, 4, 4, -4, -4),
> -};
> -const unsigned eg_max_dist_2x = 4;
> -/* 4xMSAA
> - * There are 4 locations: (-2, 6), (6, -2), (-6, 2), (2, 6). */
> -const uint32_t eg_sample_locs_4x[4] = {
> - FILL_SREG(-2, -6, 6, -2, -6, 2, 2, 6),
> - FILL_SREG(-2, -6, 6, -2, -6, 2, 2, 6),
> - FILL_SREG(-2, -6, 6, -2, -6, 2, 2, 6),
> - FILL_SREG(-2, -6, 6, -2, -6, 2, 2, 6),
> -};
> -const unsigned eg_max_dist_4x = 6;
> -
> -/* Cayman 8xMSAA */
> -static const uint32_t cm_sample_locs_8x[] = {
> - FILL_SREG( 1, -3, -1, 3, 5, 1, -3, -5),
> - FILL_SREG( 1, -3, -1, 3, 5, 1, -3, -5),
> - FILL_SREG( 1, -3, -1, 3, 5, 1, -3, -5),
> - FILL_SREG( 1, -3, -1, 3, 5, 1, -3, -5),
> - FILL_SREG(-5, 5, -7, -1, 3, 7, 7, -7),
> - FILL_SREG(-5, 5, -7, -1, 3, 7, 7, -7),
> - FILL_SREG(-5, 5, -7, -1, 3, 7, 7, -7),
> - FILL_SREG(-5, 5, -7, -1, 3, 7, 7, -7),
> +/* For obtaining location coordinates from registers */
> +#define SEXT4(x) ((int)((x) | ((x) & 0x8 ? 0xfffffff0 : 0)))
> +#define GET_SFIELD(reg, index) SEXT4(((reg) >> ((index) * 4)) & 0xf)
> +#define GET_SX(reg, index) GET_SFIELD((reg)[(index) / 4], ((index) % 4) * 2)
> +#define GET_SY(reg, index) GET_SFIELD((reg)[(index) / 4], ((index) % 4) * 2 + 1)
> +
> +/* 1x MSAA */
> +static const uint32_t sample_locs_1x =
> + FILL_SREG(0, 0, 0, 0, 0, 0, 0, 0);
> +static const unsigned max_dist_1x = 0;
> +
> +/* 2xMSAA */
> +static const uint32_t sample_locs_2x =
> + FILL_SREG(4,4, -4, -4, 0, 0, 0, 0);
> +static const unsigned max_dist_2x = 4;
> +
> +/* 4xMSAA */
> +static const uint32_t sample_locs_4x =
> + FILL_SREG(-2,-6, 6, -2, -6, 2, 2, 6);
> +static const unsigned max_dist_4x = 6;
> +
> +/* 8xMSAA */
> +static const uint32_t sample_locs_8x[] = {
> + FILL_SREG( 1,-3, -1, 3, 5, 1, -3,-5),
> + FILL_SREG(-5, 5, -7,-1, 3, 7, 7,-7),
> + /* The following are unused by hardware, but we emit them to IBs
> + * instead of multiple SET_CONTEXT_REG packets. */
> + 0,
> + 0,
> };
> -static const unsigned cm_max_dist_8x = 8;
> +static const unsigned max_dist_8x = 8;
>
> -unsigned radv_cayman_get_maxdist(int log_samples)
> +unsigned radv_get_default_max_sample_dist(int log_samples)
> {
> unsigned max_dist[] = {
> - 0,
> - eg_max_dist_2x,
> - eg_max_dist_4x,
> - cm_max_dist_8x,
> + max_dist_1x,
> + max_dist_2x,
> + max_dist_4x,
> + max_dist_8x,
> };
> return max_dist[log_samples];
> }
>
> -void radv_cayman_emit_msaa_sample_locs(struct radeon_cmdbuf *cs, int nr_samples)
> +void radv_emit_default_sample_locations(struct radeon_cmdbuf *cs, int nr_samples)
> {
> switch (nr_samples) {
> default:
> case 1:
> - radeon_set_context_reg(cs, R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, 0);
> - radeon_set_context_reg(cs, R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0, 0);
> - radeon_set_context_reg(cs, R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0, 0);
> - radeon_set_context_reg(cs, R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0, 0);
> + radeon_set_context_reg(cs, R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, sample_locs_1x);
> + radeon_set_context_reg(cs, R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0, sample_locs_1x);
> + radeon_set_context_reg(cs, R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0, sample_locs_1x);
> + radeon_set_context_reg(cs, R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0, sample_locs_1x);
> break;
> case 2:
> - radeon_set_context_reg(cs, R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, eg_sample_locs_2x[0]);
> - radeon_set_context_reg(cs, R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0, eg_sample_locs_2x[1]);
> - radeon_set_context_reg(cs, R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0, eg_sample_locs_2x[2]);
> - radeon_set_context_reg(cs, R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0, eg_sample_locs_2x[3]);
> + radeon_set_context_reg(cs, R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, sample_locs_2x);
> + radeon_set_context_reg(cs, R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0, sample_locs_2x);
> + radeon_set_context_reg(cs, R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0, sample_locs_2x);
> + radeon_set_context_reg(cs, R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0, sample_locs_2x);
> break;
> case 4:
> - radeon_set_context_reg(cs, R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, eg_sample_locs_4x[0]);
> - radeon_set_context_reg(cs, R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0, eg_sample_locs_4x[1]);
> - radeon_set_context_reg(cs, R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0, eg_sample_locs_4x[2]);
> - radeon_set_context_reg(cs, R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0, eg_sample_locs_4x[3]);
> + radeon_set_context_reg(cs, R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, sample_locs_4x);
> + radeon_set_context_reg(cs, R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0, sample_locs_4x);
> + radeon_set_context_reg(cs, R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0, sample_locs_4x);
> + radeon_set_context_reg(cs, R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0, sample_locs_4x);
> break;
> case 8:
> radeon_set_context_reg_seq(cs, R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, 14);
> - radeon_emit(cs, cm_sample_locs_8x[0]);
> - radeon_emit(cs, cm_sample_locs_8x[4]);
> - radeon_emit(cs, 0);
> - radeon_emit(cs, 0);
> - radeon_emit(cs, cm_sample_locs_8x[1]);
> - radeon_emit(cs, cm_sample_locs_8x[5]);
> - radeon_emit(cs, 0);
> - radeon_emit(cs, 0);
> - radeon_emit(cs, cm_sample_locs_8x[2]);
> - radeon_emit(cs, cm_sample_locs_8x[6]);
> - radeon_emit(cs, 0);
> - radeon_emit(cs, 0);
> - radeon_emit(cs, cm_sample_locs_8x[3]);
> - radeon_emit(cs, cm_sample_locs_8x[7]);
> + radeon_emit_array(cs, sample_locs_8x, 4);
> + radeon_emit_array(cs, sample_locs_8x, 4);
> + radeon_emit_array(cs, sample_locs_8x, 4);
> + radeon_emit_array(cs, sample_locs_8x, 2);
> break;
> }
> }
>
> -static void radv_cayman_get_sample_position(struct radv_device *device,
> - unsigned sample_count,
> - unsigned sample_index, float *out_value)
> +static void radv_get_sample_position(struct radv_device *device,
> + unsigned sample_count,
> + unsigned sample_index, float *out_value)
> {
> - int offset, index;
> - struct {
> - int idx:4;
> - } val;
> + const uint32_t *sample_locs;
> +
> switch (sample_count) {
> case 1:
> default:
> - out_value[0] = out_value[1] = 0.5;
> + sample_locs = &sample_locs_1x;
> break;
> case 2:
> - offset = 4 * (sample_index * 2);
> - val.idx = (eg_sample_locs_2x[0] >> offset) & 0xf;
> - out_value[0] = (float)(val.idx + 8) / 16.0f;
> - val.idx = (eg_sample_locs_2x[0] >> (offset + 4)) & 0xf;
> - out_value[1] = (float)(val.idx + 8) / 16.0f;
> + sample_locs = &sample_locs_2x;
> break;
> case 4:
> - offset = 4 * (sample_index * 2);
> - val.idx = (eg_sample_locs_4x[0] >> offset) & 0xf;
> - out_value[0] = (float)(val.idx + 8) / 16.0f;
> - val.idx = (eg_sample_locs_4x[0] >> (offset + 4)) & 0xf;
> - out_value[1] = (float)(val.idx + 8) / 16.0f;
> + sample_locs = &sample_locs_4x;
> break;
> case 8:
> - offset = 4 * (sample_index % 4 * 2);
> - index = (sample_index / 4) * 4;
> - val.idx = (cm_sample_locs_8x[index] >> offset) & 0xf;
> - out_value[0] = (float)(val.idx + 8) / 16.0f;
> - val.idx = (cm_sample_locs_8x[index] >> (offset + 4)) & 0xf;
> - out_value[1] = (float)(val.idx + 8) / 16.0f;
> + sample_locs = sample_locs_8x;
> break;
> }
> +
> + out_value[0] = (GET_SX(sample_locs, sample_index) + 8) / 16.0f;
> + out_value[1] = (GET_SY(sample_locs, sample_index) + 8) / 16.0f;
> }
>
> void radv_device_init_msaa(struct radv_device *device)
> {
> int i;
> - radv_cayman_get_sample_position(device, 1, 0, device->sample_locations_1x[0]);
> +
> + radv_get_sample_position(device, 1, 0, device->sample_locations_1x[0]);
>
> for (i = 0; i < 2; i++)
> - radv_cayman_get_sample_position(device, 2, i, device->sample_locations_2x[i]);
> + radv_get_sample_position(device, 2, i, device->sample_locations_2x[i]);
> for (i = 0; i < 4; i++)
> - radv_cayman_get_sample_position(device, 4, i, device->sample_locations_4x[i]);
> + radv_get_sample_position(device, 4, i, device->sample_locations_4x[i]);
> for (i = 0; i < 8; i++)
> - radv_cayman_get_sample_position(device, 8, i, device->sample_locations_8x[i]);
> + radv_get_sample_position(device, 8, i, device->sample_locations_8x[i]);
> }
> --
> 2.21.0
>
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