[Mesa-dev] [PATCH 05/13] panfrost/midgard: Set masks on ld_vary

[Alyssa Rosenzweig]

These masks distinguish scalar/vec2/vec3 loads from the default vec4,
which helps with assembly readability and will enable smarter RA.

Signed-off-by: Alyssa Rosenzweig <alyssa at rosenzweig.io>
---
 src/gallium/drivers/panfrost/midgard/midgard_compile.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/src/gallium/drivers/panfrost/midgard/midgard_compile.c b/src/gallium/drivers/panfrost/midgard/midgard_compile.c
index 8bb9e729d71..1c50a167097 100644
--- a/src/gallium/drivers/panfrost/midgard/midgard_compile.c
+++ b/src/gallium/drivers/panfrost/midgard/midgard_compile.c
@@ -1094,6 +1094,7 @@ emit_intrinsic(compiler_context *ctx, nir_intrinsic_instr *instr)
         case nir_intrinsic_load_input:
                 offset = nir_intrinsic_base(instr);
 
+                unsigned nr_comp = nir_intrinsic_dest_components(instr);
                 bool direct = nir_src_is_const(instr->src[0]);
 
                 if (direct) {
@@ -1109,6 +1110,7 @@ emit_intrinsic(compiler_context *ctx, nir_intrinsic_instr *instr)
                         /* TODO: swizzle, mask */
 
                         midgard_instruction ins = m_ld_vary_32(reg, offset);
+                        ins.load_store.mask = (1 << nr_comp) - 1;
 
                         midgard_varying_parameter p = {
                                 .is_varying = 1,
@@ -1140,7 +1142,7 @@ emit_intrinsic(compiler_context *ctx, nir_intrinsic_instr *instr)
                 }  else if (ctx->stage == MESA_SHADER_VERTEX) {
                         midgard_instruction ins = m_ld_attr_32(reg, offset);
                         ins.load_store.unknown = 0x1E1E; /* XXX: What is this? */
-                        ins.load_store.mask = (1 << instr->num_components) - 1;
+                        ins.load_store.mask = (1 << nr_comp) - 1;
                         emit_mir_instruction(ctx, ins);
                 } else {
                         DBG("Unknown load\n");
-- 
2.20.1