[Mesa-dev] Mesa 20.3 status
Dylan Baker
dylan at pnwbakers.com
Fri Mar 12 00:53:24 UTC 2021
Hi list,
Mesa 21.0.0 is now out the door. We're really behind on the 20.3 branch,
but I'm just too exhuasted to try to keep maintaining both branches,
especially with 21.1 coming up, so I'm planning to do one more release
of 20.3.x along with this. You can see the current status of the branch
on githlab. The following are patches that 1) don't apply cleaningly, 2)
don't compile, or 3) cause regressions in the CI.
I'm hoping to make the final release (barring any pressing regressions
in this release) next wedensday. If you see something in here that you
want to see in that release, please create an MR agianst the
staging/20.3 branch.
Cheers,
Dylan
P.S. If you're interested in helping with releases, I'd love to talk
with you about it :)
Outstanding patches:
9f2afe4170 v3dv: fix incorrect slice selection for TFU jobs
2832cbea7a v3dv: fix BO list for TFU jobs
e5499ca2bf freedreno/a6xx: Fix SP_HS_UNKNOWN_A831 value and document it
2d0c723ce6 radv: make sure FMASK compression is enabled for MSAA copies
6b538506f2 aco/ra: Fix register allocation for subdword operands
b6b6d1ff3c radeonsi: fix hang caused by for loop with exec=0 in LS and ES
38823ba60d panfrost: Fix estimate_texture_payload_size() on Bifrost
198c3acacf r600/sfn: fix use of b32all/and
914c61d6c0 radv,aco: don't use MUBUF for multi-channel loads on GFX8 with robustness2
d74b012260 zink: fix vertex-stride wrangling
c40ea24ee0 radv: fix overflow when computing the SQTT buffer size
5b5cd18853 radv: inhibit clock gating when tracing with SQTT
45bebc7a9c zink: respect fragment-shader depth-layout
3ef89b245e radv: fix separate depth/stencil layout in render pass
bb8f87088c radv,aco: fix shifting input VGPRs for the LS VGPR init bug on GFX9
12ce72fcfc radv: Use stricter HW resolve swizzle compat check.
9f3d5e99ea compiler: Use util/bitset.h for system_values_read
0aa63c31ca Revert "gallium/u_upload_mgr: allow use of FLUSH_EXPLICIT with persistent mappings"
f695957421 radv: move queue object to a common base object
bd1705a480 vulkan: Make vk_debug_report_callback derive from vk_object_base
56cd79b63d radv: round-up num_records division in radv_flush_vertex_descriptors
2338e4ad36 radv: correctly enable WGP_MODE for NGG and GS
0464117ad9 ci: remove nouveau from shader-db runs
cc0841c82a vc4: Remove vestiges of alpha test lowering.
5ddc2f916f v3d: Clean up vestiges of alpha test lowering.
f502bdf1ab radv: only apply the MRT output NaN fixup to non-meta shaders
8b133a1b25 nir: Fix parameter order in the bcsel-of-shuffle optimization
bddc0e023c radeonsi: fix read from compute / write from draw sync
a67d3e7c9e radeonsi: fix si_check_render_feedback
48f349971f aco: Fix LDS statistics of tess control shaders.
b6b3b38434 turnip: consider HW limit on number of views when apply multipos opt
5a340c0929 vulkan/util: add api to reset object magic + private data.
bd98fc39ae radv: reset object base on recycled command buffers
7b1568b7a3 tu: reset object base on recycled command buffers
226c7ae2a8 lavapipe: reset object base on recycled command buffers
8b44e45347 intel/perf: fix roll over PERF_CNT counter accumulation
cb74cd816c anv: reset binary syncobj to be signaled before submission
8a47422d97 radv: do not scale the depth bias for D16_UNORM depth surfaces
5f1b354472 aco: calculate all p_as_uniform and v_readfirstlane_b32 sources in WQM
9fb9019beb util/u_queue: Ensure num_cpu_mask_bits is valid
3d3f21f0be ci: add libdrm to the x86_test-vk container
0a939e788f lavapipe: reorder descriptor set stages to get correct binding
abc724e440 lavapipe: sort bindings before creating descriptor set
db67d9c0d1 radeonsi: don't crash on NULL images in si_check_needs_implicit_sync
cbb5ed476c nir/opt_shrink_vectors: add option to skip shrinking image stores
21697082ec radv: don't shrink image stores for The Surge 2
6bcd304278 lavapipe: fix pipeline vp/scissor mixup.
8955d179d3 anv: fix MI_PREDICATE_RESULT write
12f1e42ed3 tegra/context: unwrap indirect_draw_count as well
3436e5295b pan/bi: Treat +DISCARD.f32 as message-passing
2c02740a8c intel/mi_builder: Use AddCSMMIOStartOffset for LRI
d4f21b53f2 nir/range_analysis: Add "is finite" range analysis tracking
aa5d38decd nir/range_analysis: Add "is a number" range analysis tracking
f4a7dbc58f nir/range_analysis: Fix analysis of fmin, fmax, or fsat with NaN source
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