Hi,<div>I'd already suggested the same, but it never got pushed:</div><div><a href="https://lists.freedesktop.org/archives/mesa-dev/2016-May/115501.html">https://lists.freedesktop.org/archives/mesa-dev/2016-May/115501.html</a></div><div><br></div><div>So I guess we can add the Tested-by from the other, for whichever gets pushed.</div><div><br></div><div>Cheers,</div><div>Daniel<span></span></div><div><br>On Sunday, 8 May 2016, Hans de Goede <<a href="mailto:hdegoede@redhat.com">hdegoede@redhat.com</a>> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">This reverts commit 6a0d036483caf87d43ebe2edd1905873446c9589.<br>
<br>
This commit breaks both gdm on wayland as well as gnome-shell on Xorg<br>
(with the modesetting driver) on my skylake desktop with 2 hdmi attached<br>
1920x1080 dvi-monitors.<br>
<br>
The symptons in both cases are both monitors showing whatever was there<br>
before with a mouse cursor drawn centered on the primary monitor. In the<br>
gnome-shell on Xorg case I can still vt-switch and after vt-switching<br>
back Xorg exits with an error.<br>
<br>
When this commit is not reverted the following errors show up in Xorg.log<br>
when starting X with gnome-shell: "failed to add fb -22", this error<br>
also triggers the exit with an error on vt-switching back.<br>
<br>
These errors come from the modesetting driver:<br>
<br>
if (drmmode->fb_id == 0) {<br>
ret = drmModeAddFB(drmmode->fd,<br>
pScrn->virtualX, height,<br>
pScrn->depth, pScrn->bitsPerPixel,<br>
drmmode_bo_get_pitch(&drmmode->front_bo),<br>
drmmode_bo_get_handle(&drmmode->front_bo),<br>
&drmmode->fb_id);<br>
if (ret < 0) {<br>
ErrorF("failed to add fb %d\n", ret);<br>
return FALSE;<br>
}<br>
}<br>
<br>
Signed-off-by: Hans de Goede <<a href="javascript:;" onclick="_e(event, 'cvml', 'hdegoede@redhat.com')">hdegoede@redhat.com</a>><br>
---<br>
src/mesa/drivers/dri/i965/brw_meta_fast_clear.c | 4 ++--<br>
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 10 ++--------<br>
src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 3 +--<br>
src/mesa/drivers/dri/i965/intel_screen.c | 21 +++------------------<br>
4 files changed, 8 insertions(+), 30 deletions(-)<br>
<br>
diff --git a/src/mesa/drivers/dri/i965/brw_meta_fast_clear.c b/src/mesa/drivers/dri/i965/brw_meta_fast_clear.c<br>
index 7760cce..76988bf 100644<br>
--- a/src/mesa/drivers/dri/i965/brw_meta_fast_clear.c<br>
+++ b/src/mesa/drivers/dri/i965/brw_meta_fast_clear.c<br>
@@ -244,7 +244,7 @@ brw_get_fast_clear_rect(const struct brw_context *brw,<br>
* alignment size returned by intel_get_non_msrt_mcs_alignment(), but<br>
* with X alignment multiplied by 16 and Y alignment multiplied by 32.<br>
*/<br>
- intel_get_non_msrt_mcs_alignment(brw, mt, &x_align, &y_align);<br>
+ intel_get_non_msrt_mcs_alignment(mt, &x_align, &y_align);<br>
x_align *= 16;<br>
<br>
/* SKL+ line alignment requirement for Y-tiled are half those of the prior<br>
@@ -838,7 +838,7 @@ brw_get_resolve_rect(const struct brw_context *brw,<br>
* by a factor of 2.<br>
*/<br>
<br>
- intel_get_non_msrt_mcs_alignment(brw, mt, &x_align, &y_align);<br>
+ intel_get_non_msrt_mcs_alignment(mt, &x_align, &y_align);<br>
if (brw->gen >= 9) {<br>
x_scaledown = x_align * 8;<br>
y_scaledown = y_align * 8;<br>
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c<br>
index 3d8f48e..94f6333 100644<br>
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c<br>
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c<br>
@@ -144,8 +144,7 @@ compute_msaa_layout(struct brw_context *brw, mesa_format format,<br>
* by half the block width, and Y coordinates by half the block height.<br>
*/<br>
void<br>
-intel_get_non_msrt_mcs_alignment(const struct brw_context *brw,<br>
- const struct intel_mipmap_tree *mt,<br>
+intel_get_non_msrt_mcs_alignment(const struct intel_mipmap_tree *mt,<br>
unsigned *width_px, unsigned *height)<br>
{<br>
switch (mt->tiling) {<br>
@@ -157,11 +156,6 @@ intel_get_non_msrt_mcs_alignment(const struct brw_context *brw,<br>
*height = 4;<br>
break;<br>
case I915_TILING_X:<br>
- /* The docs are somewhat confusing with the way the tables are displayed.<br>
- * However, it does clearly state: "MCS and Lossless compression is<br>
- * supported for TiledY/TileYs/TileYf non-MSRTs only."<br>
- */<br>
- assert(brw->gen < 9);<br>
*width_px = 64 / mt->cpp;<br>
*height = 2;<br>
}<br>
@@ -1558,7 +1552,7 @@ intel_miptree_alloc_non_msrt_mcs(struct brw_context *brw,<br>
const mesa_format format = MESA_FORMAT_R_UINT32;<br>
unsigned block_width_px;<br>
unsigned block_height;<br>
- intel_get_non_msrt_mcs_alignment(brw, mt, &block_width_px, &block_height);<br>
+ intel_get_non_msrt_mcs_alignment(mt, &block_width_px, &block_height);<br>
unsigned width_divisor = block_width_px * 4;<br>
unsigned height_divisor = block_height * 8;<br>
<br>
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h<br>
index 21e4718..7862152 100644<br>
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h<br>
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h<br>
@@ -663,8 +663,7 @@ struct intel_mipmap_tree<br>
};<br>
<br>
void<br>
-intel_get_non_msrt_mcs_alignment(const struct brw_context *brw,<br>
- const struct intel_mipmap_tree *mt,<br>
+intel_get_non_msrt_mcs_alignment(const struct intel_mipmap_tree *mt,<br>
unsigned *width_px, unsigned *height);<br>
<br>
bool<br>
diff --git a/src/mesa/drivers/dri/i965/intel_screen.c b/src/mesa/drivers/dri/i965/intel_screen.c<br>
index 878901a..db9d94d 100644<br>
--- a/src/mesa/drivers/dri/i965/intel_screen.c<br>
+++ b/src/mesa/drivers/dri/i965/intel_screen.c<br>
@@ -516,11 +516,7 @@ intel_create_image(__DRIscreen *screen,<br>
int cpp;<br>
unsigned long pitch;<br>
<br>
- if (intelScreen->devinfo->gen >= 9) {<br>
- tiling = I915_TILING_Y;<br>
- } else {<br>
- tiling = I915_TILING_X;<br>
- }<br>
+ tiling = I915_TILING_X;<br>
if (use & __DRI_IMAGE_USE_CURSOR) {<br>
if (width != 64 || height != 64)<br>
return NULL;<br>
@@ -1148,14 +1144,8 @@ intel_detect_swizzling(struct intel_screen *screen)<br>
drm_intel_bo *buffer;<br>
unsigned long flags = 0;<br>
unsigned long aligned_pitch;<br>
+ uint32_t tiling = I915_TILING_X;<br>
uint32_t swizzle_mode = 0;<br>
- uint32_t tiling;<br>
-<br>
- if (screen->devinfo->gen >= 9) {<br>
- tiling = I915_TILING_Y;<br>
- } else {<br>
- tiling = I915_TILING_X;<br>
- }<br>
<br>
buffer = drm_intel_bo_alloc_tiled(screen->bufmgr, "swizzle test",<br>
64, 64, 4,<br>
@@ -1581,12 +1571,7 @@ intelAllocateBuffer(__DRIscreen *screen,<br>
return NULL;<br>
<br>
/* The front and back buffers are color buffers, which are X tiled. */<br>
- uint32_t tiling;<br>
- if (intelScreen->devinfo->gen >= 9) {<br>
- tiling = I915_TILING_Y;<br>
- } else {<br>
- tiling = I915_TILING_X;<br>
- }<br>
+ uint32_t tiling = I915_TILING_X;<br>
unsigned long pitch;<br>
int cpp = format / 8;<br>
intelBuffer->bo = drm_intel_bo_alloc_tiled(intelScreen->bufmgr,<br>
--<br>
2.7.4<br>
<br>
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</blockquote></div>