<div dir="ltr"><div class="gmail_extra"><div class="gmail_quote">On Fri, May 13, 2016 at 12:58 AM, Pohjolainen, Topi <span dir="ltr"><<a href="mailto:topi.pohjolainen@intel.com" target="_blank">topi.pohjolainen@intel.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><span class="">On Tue, May 10, 2016 at 04:16:26PM -0700, Jason Ekstrand wrote:<br>
> This better matches gen8 state setup<br>
<br>
</span>I don't think anything in the rest of the series depends on this:<br></blockquote><div><br></div><div>It mostly just made the next "reshuffle everything" patch a bit cleaner.<br></div><div> </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
Acked-by: Topi Pohjolainen <<a href="mailto:topi.pohjolainen@intel.com">topi.pohjolainen@intel.com</a>><br>
<span class=""><br>
> ---<br>
>  src/mesa/drivers/dri/i965/gen7_wm_state.c | 4 ++--<br>
>  1 file changed, 2 insertions(+), 2 deletions(-)<br>
><br>
> diff --git a/src/mesa/drivers/dri/i965/gen7_wm_state.c b/src/mesa/drivers/dri/i965/gen7_wm_state.c<br>
> index 17dea99..8d2e2c3 100644<br>
> --- a/src/mesa/drivers/dri/i965/gen7_wm_state.c<br>
> +++ b/src/mesa/drivers/dri/i965/gen7_wm_state.c<br>
> @@ -214,6 +214,8 @@ gen7_upload_ps_state(struct brw_context *brw,<br>
>     if (prog_data->num_varying_inputs != 0)<br>
>        dw4 |= GEN7_PS_ATTRIBUTE_ENABLE;<br>
><br>
> +   dw4 |= fast_clear_op;<br>
> +<br>
>     if (prog_data->prog_offset_16 || prog_data->no_8) {<br>
>        dw4 |= GEN7_PS_16_DISPATCH_ENABLE;<br>
><br>
> @@ -243,8 +245,6 @@ gen7_upload_ps_state(struct brw_context *brw,<br>
>        ksp0 = stage_state->prog_offset;<br>
>     }<br>
><br>
> -   dw4 |= fast_clear_op;<br>
> -<br>
>     BEGIN_BATCH(8);<br>
>     OUT_BATCH(_3DSTATE_PS << 16 | (8 - 2));<br>
>     OUT_BATCH(ksp0);<br>
> --<br>
> 2.5.0.400.gff86faf<br>
><br>
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</blockquote></div><br></div></div>