<p dir="ltr">Rb</p>
<div class="gmail_quote">On May 20, 2016 10:49 PM, "Francisco Jerez" <<a href="mailto:currojerez@riseup.net">currojerez@riseup.net</a>> wrote:<br type="attribution"><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">The benefit is we will be able to use the SIMD lowering pass to unroll<br>
math instructions of unsupported width and then remove some cruft from<br>
the generator.<br>
---<br>
src/mesa/drivers/dri/i965/brw_fs.cpp | 55 ++++++++++++++++++++++++++++++<br>
src/mesa/drivers/dri/i965/brw_fs_builder.h | 47 +++----------------------<br>
2 files changed, 60 insertions(+), 42 deletions(-)<br>
<br>
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp<br>
index fc774da..c176807 100644<br>
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp<br>
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp<br>
@@ -4442,6 +4442,36 @@ lower_varying_pull_constant_logical_send(const fs_builder &bld, fs_inst *inst)<br>
}<br>
}<br>
<br>
+static void<br>
+lower_math_logical_send(const fs_builder &bld, fs_inst *inst)<br>
+{<br>
+ assert(bld.shader->devinfo->gen < 6);<br>
+<br>
+ inst->base_mrf = 2;<br>
+ inst->mlen = inst->sources * inst->exec_size / 8;<br>
+<br>
+ if (inst->sources > 1) {<br>
+ /* From the Ironlake PRM, Volume 4, Part 1, Section 6.1.13<br>
+ * "Message Payload":<br>
+ *<br>
+ * "Operand0[7]. For the INT DIV functions, this operand is the<br>
+ * denominator."<br>
+ * ...<br>
+ * "Operand1[7]. For the INT DIV functions, this operand is the<br>
+ * numerator."<br>
+ */<br>
+ const bool is_int_div = inst->opcode != SHADER_OPCODE_POW;<br>
+ const fs_reg src0 = is_int_div ? inst->src[1] : inst->src[0];<br>
+ const fs_reg src1 = is_int_div ? inst->src[0] : inst->src[1];<br>
+<br>
+ inst->resize_sources(1);<br>
+ inst->src[0] = src0;<br>
+<br>
+ assert(inst->exec_size == 8);<br>
+ bld.MOV(fs_reg(MRF, inst->base_mrf + 1, src1.type), src1);<br>
+ }<br>
+}<br>
+<br>
bool<br>
fs_visitor::lower_logical_sends()<br>
{<br>
@@ -4551,6 +4581,31 @@ fs_visitor::lower_logical_sends()<br>
lower_varying_pull_constant_logical_send(ibld, inst);<br>
break;<br>
<br>
+ case SHADER_OPCODE_RCP:<br>
+ case SHADER_OPCODE_RSQ:<br>
+ case SHADER_OPCODE_SQRT:<br>
+ case SHADER_OPCODE_EXP2:<br>
+ case SHADER_OPCODE_LOG2:<br>
+ case SHADER_OPCODE_SIN:<br>
+ case SHADER_OPCODE_COS:<br>
+ case SHADER_OPCODE_POW:<br>
+ case SHADER_OPCODE_INT_QUOTIENT:<br>
+ case SHADER_OPCODE_INT_REMAINDER:<br>
+ /* The math opcodes are overloaded for the send-like and<br>
+ * expression-like instructions which seems kind of icky. Gen6+ has<br>
+ * a native (but rather quirky) MATH instruction so we don't need to<br>
+ * do anything here. On Gen4-5 we'll have to lower the Gen6-like<br>
+ * logical instructions (which we can easily recognize because they<br>
+ * have mlen = 0) into send-like virtual instructions.<br>
+ */<br>
+ if (devinfo->gen < 6 && !inst->mlen) {<br>
+ lower_math_logical_send(ibld, inst);<br>
+ break;<br>
+<br>
+ } else {<br>
+ continue;<br>
+ }<br>
+<br>
default:<br>
continue;<br>
}<br>
diff --git a/src/mesa/drivers/dri/i965/brw_fs_builder.h b/src/mesa/drivers/dri/i965/brw_fs_builder.h<br>
index 2087e58..b50dda4 100644<br>
--- a/src/mesa/drivers/dri/i965/brw_fs_builder.h<br>
+++ b/src/mesa/drivers/dri/i965/brw_fs_builder.h<br>
@@ -281,9 +281,8 @@ namespace brw {<br>
case SHADER_OPCODE_LOG2:<br>
case SHADER_OPCODE_SIN:<br>
case SHADER_OPCODE_COS:<br>
- return fix_math_instruction(<br>
- emit(instruction(opcode, dispatch_width(), dst,<br>
- fix_math_operand(src0))));<br>
+ return emit(instruction(opcode, dispatch_width(), dst,<br>
+ fix_math_operand(src0)));<br>
<br>
default:<br>
return emit(instruction(opcode, dispatch_width(), dst, src0));<br>
@@ -301,10 +300,9 @@ namespace brw {<br>
case SHADER_OPCODE_POW:<br>
case SHADER_OPCODE_INT_QUOTIENT:<br>
case SHADER_OPCODE_INT_REMAINDER:<br>
- return fix_math_instruction(<br>
- emit(instruction(opcode, dispatch_width(), dst,<br>
- fix_math_operand(src0),<br>
- fix_math_operand(src1))));<br>
+ return emit(instruction(opcode, dispatch_width(), dst,<br>
+ fix_math_operand(src0),<br>
+ fix_math_operand(src1)));<br>
<br>
default:<br>
return emit(instruction(opcode, dispatch_width(), dst, src0, src1));<br>
@@ -640,41 +638,6 @@ namespace brw {<br>
}<br>
}<br>
<br>
- /**<br>
- * Workaround other weirdness of the math instruction.<br>
- */<br>
- instruction *<br>
- fix_math_instruction(instruction *inst) const<br>
- {<br>
- if (shader->devinfo->gen < 6) {<br>
- inst->base_mrf = 2;<br>
- inst->mlen = inst->sources * dispatch_width() / 8;<br>
-<br>
- if (inst->sources > 1) {<br>
- /* From the Ironlake PRM, Volume 4, Part 1, Section 6.1.13<br>
- * "Message Payload":<br>
- *<br>
- * "Operand0[7]. For the INT DIV functions, this operand is the<br>
- * denominator."<br>
- * ...<br>
- * "Operand1[7]. For the INT DIV functions, this operand is the<br>
- * numerator."<br>
- */<br>
- const bool is_int_div = inst->opcode != SHADER_OPCODE_POW;<br>
- const fs_reg src0 = is_int_div ? inst->src[1] : inst->src[0];<br>
- const fs_reg src1 = is_int_div ? inst->src[0] : inst->src[1];<br>
-<br>
- inst->resize_sources(1);<br>
- inst->src[0] = src0;<br>
-<br>
- at(block, inst).MOV(fs_reg(MRF, inst->base_mrf + 1, src1.type),<br>
- src1);<br>
- }<br>
- }<br>
-<br>
- return inst;<br>
- }<br>
-<br>
bblock_t *block;<br>
exec_node *cursor;<br>
<br>
--<br>
2.7.3<br>
<br>
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</blockquote></div>