On Jun 23, 2016 6:33 AM, "Giuseppe Bilotta" <<a href="mailto:giuseppe.bilotta@gmail.com">giuseppe.bilotta@gmail.com</a>> wrote: > > Clean up misrepetitions ('if if', 'the the' etc) found throughout the > comments. This has been done manually, after grepping > case-insensitively for duplicate if, is, the, then, do, for, an > > v2: > * proper commit message and non-joke title; > * replace two 'as is' followed by 'is' to 'as-is'. > > Signed-off-by: Giuseppe Bilotta <<a href="mailto:giuseppe.bilotta@gmail.com">giuseppe.bilotta@gmail.com</a>> > --- > include/GL/mesa_glinterop.h | 6 +++--- > src/compiler/glsl/glsl_to_nir.cpp | 2 +- > src/compiler/nir/nir.h | 2 +- > src/compiler/nir/nir_intrinsics.h | 4 ++-- > src/compiler/nir/nir_lower_vars_to_ssa.c | 2 +- > src/compiler/nir/nir_lower_wpos_ytransform.c | 2 +- > src/compiler/nir/nir_opt_dead_cf.c | 2 +- > src/compiler/spirv/spirv_to_nir.c | 2 +- > src/gallium/docs/source/context.rst | 2 +- > src/gallium/drivers/freedreno/freedreno_texture.h | 2 +- > src/gallium/drivers/nouveau/nouveau_buffer.c | 2 +- > src/gallium/drivers/r300/compiler/radeon_dataflow.c | 2 +- > src/gallium/drivers/r300/compiler/radeon_vert_fc.c | 2 +- > src/gallium/drivers/svga/svga_format.c | 2 +- > src/gallium/drivers/swr/rasterizer/core/backend.h | 4 ++-- > src/gallium/drivers/swr/rasterizer/core/state.h | 2 +- > src/gallium/drivers/swr/rasterizer/core/threads.cpp | 2 +- > src/gallium/drivers/vc4/kernel/vc4_validate_shaders.c | 2 +- > src/gallium/drivers/vc4/vc4_qir_schedule.c | 2 +- > src/gallium/state_trackers/nine/device9.c | 2 +- > src/gbm/main/gbm.c | 2 +- > src/gtest/src/gtest.cc | 2 +- > src/mesa/drivers/dri/i965/brw_device_info.h | 2 +- > src/mesa/drivers/dri/i965/brw_fs.cpp | 2 +- > src/mesa/drivers/dri/i965/brw_nir_opt_peephole_ffma.c | 2 +- > src/mesa/drivers/dri/i965/brw_performance_monitor.c | 2 +- > src/mesa/drivers/x11/xm_buffer.c | 2 +- > src/mesa/main/texobj.c | 2 +- > src/mesa/program/ir_to_mesa.cpp | 2 +- > src/mesa/state_tracker/st_cb_fbo.c | 2 +- > src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 4 ++-- > src/mesa/state_tracker/st_mesa_to_tgsi.c | 2 +- > 32 files changed, 37 insertions(+), 37 deletions(-) > > diff --git a/include/GL/mesa_glinterop.h b/include/GL/mesa_glinterop.h > index c0c20d6..383d7f9 100644 > --- a/include/GL/mesa_glinterop.h > +++ b/include/GL/mesa_glinterop.h > @@ -97,7 +97,7 @@ struct mesa_glinterop_device_info { > /* The callee will overwrite it if it supports a lower version. > * > * The caller should check the value and access up-to the version supported > - * by the the callee. > + * by the callee. > */ > /* NOTE: Do not use the MESA_GLINTEROP_DEVICE_INFO_VERSION macro */ > uint32_t version; > @@ -125,7 +125,7 @@ struct mesa_glinterop_export_in { > /* The callee will overwrite it if it supports a lower version. > * > * The caller should check the value and access up-to the version supported > - * by the the callee. > + * by the callee. > */ > /* NOTE: Do not use the MESA_GLINTEROP_EXPORT_IN_VERSION macro */ > uint32_t version; > @@ -190,7 +190,7 @@ struct mesa_glinterop_export_out { > /* The callee will overwrite it if it supports a lower version. > * > * The caller should check the value and access up-to the version supported > - * by the the callee. > + * by the callee. > */ > /* NOTE: Do not use the MESA_GLINTEROP_EXPORT_OUT_VERSION macro */ > uint32_t version; > diff --git a/src/compiler/glsl/glsl_to_nir.cpp b/src/compiler/glsl/glsl_to_nir.cpp > index 16d0c1d..a22fd5b 100644 > --- a/src/compiler/glsl/glsl_to_nir.cpp > +++ b/src/compiler/glsl/glsl_to_nir.cpp > @@ -1950,7 +1950,7 @@ void > nir_visitor::visit(ir_constant *ir) > { > /* > - * We don't know if this variable is an an array or struct that gets > + * We don't know if this variable is an array or struct that gets > * dereferenced, so do the safe thing an make it a variable with a > * constant initializer and return a dereference. > */ > diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h > index 1725ee3..94dee4d 100644 > --- a/src/compiler/nir/nir.h > +++ b/src/compiler/nir/nir.h > @@ -804,7 +804,7 @@ typedef struct { > } nir_deref_var; > > /* This enum describes how the array is referenced. If the deref is > - * direct then the base_offset is used. If the deref is indirect then then > + * direct then the base_offset is used. If the deref is indirect then > * offset is given by base_offset + indirect. If the deref is a wildcard > * then the deref refers to all of the elements of the array at the same > * time. Wildcard dereferences are only ever allowed in copy_var > diff --git a/src/compiler/nir/nir_intrinsics.h b/src/compiler/nir/nir_intrinsics.h > index 6f86c9f..ae253f0 100644 > --- a/src/compiler/nir/nir_intrinsics.h > +++ b/src/compiler/nir/nir_intrinsics.h > @@ -48,9 +48,9 @@ INTRINSIC(copy_var, 0, ARR(0), false, 0, 2, 0, xx, xx, xx, 0) > > /* > * Interpolation of input. The interp_var_at* intrinsics are similar to the > - * load_var intrinsic acting an a shader input except that they interpolate > + * load_var intrinsic acting on a shader input except that they interpolate > * the input differently. The at_sample and at_offset intrinsics take an > - * aditional source that is a integer sample id or a vec2 position offset > + * additional source that is a integer sample id or a vec2 position offset While you're here, that should be "an integer" With or without that fix, Reviewed-by: Jason Ekstrand <<a href="mailto:jason@jlekstrand.net">jason@jlekstrand.net</a>> > * respectively. > */ > > diff --git a/src/compiler/nir/nir_lower_vars_to_ssa.c b/src/compiler/nir/nir_lower_vars_to_ssa.c > index d62cec0..317647b 100644 > --- a/src/compiler/nir/nir_lower_vars_to_ssa.c > +++ b/src/compiler/nir/nir_lower_vars_to_ssa.c > @@ -621,7 +621,7 @@ rename_variables_block(nir_block *block, struct lower_variables_state *state) > * fully-direct references we see and store them in the > * direct_deref_nodes hash table. > * > - * 2) Walk over the the list of fully-qualified direct derefs generated in > + * 2) Walk over the list of fully-qualified direct derefs generated in > * the previous pass. For each deref, we determine if it can ever be > * aliased, i.e. if there is an indirect reference anywhere that may > * refer to it. If it cannot be aliased, we mark it for lowering to an > diff --git a/src/compiler/nir/nir_lower_wpos_ytransform.c b/src/compiler/nir/nir_lower_wpos_ytransform.c > index ccf0fd3..173f058 100644 > --- a/src/compiler/nir/nir_lower_wpos_ytransform.c > +++ b/src/compiler/nir/nir_lower_wpos_ytransform.c > @@ -159,7 +159,7 @@ lower_fragcoord(lower_wpos_ytransform_state *state, nir_intrinsic_instr *intr) > * > * The bias of the y-coordinate depends on whether y-inversion takes place > * (adjY[1]) or not (adjY[0]), which is in turn dependent on whether we are > - * drawing to an FBO (causes additional inversion), and whether the the pipe > + * drawing to an FBO (causes additional inversion), and whether the pipe > * driver origin and the requested origin differ (the latter condition is > * stored in the 'invert' variable). > * > diff --git a/src/compiler/nir/nir_opt_dead_cf.c b/src/compiler/nir/nir_opt_dead_cf.c > index 74af19b..81c1b65 100644 > --- a/src/compiler/nir/nir_opt_dead_cf.c > +++ b/src/compiler/nir/nir_opt_dead_cf.c > @@ -30,7 +30,7 @@ > > /* > * This file implements an optimization that deletes statically > - * unreachable/dead code. In NIR, one way this can happen if if an if > + * unreachable/dead code. In NIR, one way this can happen is when an if > * statement has a constant condition: > * > * if (true) { > diff --git a/src/compiler/spirv/spirv_to_nir.c b/src/compiler/spirv/spirv_to_nir.c > index f1bbfd5..85f53a0 100644 > --- a/src/compiler/spirv/spirv_to_nir.c > +++ b/src/compiler/spirv/spirv_to_nir.c > @@ -2458,7 +2458,7 @@ vtn_handle_execution_mode(struct vtn_builder *b, struct vtn_value *entry_point, > b->shader->info.cs.local_size[2] = mode->literals[2]; > break; > case SpvExecutionModeLocalSizeHint: > - break; /* Nothing do do with this */ > + break; /* Nothing to do with this */ > > case SpvExecutionModeOutputVertices: > assert(b->shader->stage == MESA_SHADER_GEOMETRY); > diff --git a/src/gallium/docs/source/context.rst b/src/gallium/docs/source/context.rst > index 6f09c55..05c6f11 100644 > --- a/src/gallium/docs/source/context.rst > +++ b/src/gallium/docs/source/context.rst > @@ -234,7 +234,7 @@ include several layers), this surface need not be bound to the framebuffer. > > ``clear_depth_stencil`` clears a single depth, stencil or depth/stencil surface > with the specified depth and stencil values (for combined depth/stencil buffers, > -is is also possible to only clear one or the other part). While it is only > +it is also possible to only clear one or the other part). While it is only > possible to clear one surface at a time (which can include several layers), > this surface need not be bound to the framebuffer. > > diff --git a/src/gallium/drivers/freedreno/freedreno_texture.h b/src/gallium/drivers/freedreno/freedreno_texture.h > index fa27d1c..b52e27d 100644 > --- a/src/gallium/drivers/freedreno/freedreno_texture.h > +++ b/src/gallium/drivers/freedreno/freedreno_texture.h > @@ -55,7 +55,7 @@ struct fd_texture_stateobj; > * | fp16[3] / > * 0x08: | padding > * 0x10: | int16[0] \ > - * | int16[1] |___ swizzled int16 channels for for "small integer" > + * | int16[1] |___ swizzled int16 channels for "small integer" > * | int16[2] | formats (<= 16 bits per component, integer) > * | int16[3] / > * 0x18: | padding > diff --git a/src/gallium/drivers/nouveau/nouveau_buffer.c b/src/gallium/drivers/nouveau/nouveau_buffer.c > index 2db538c..7c1421b 100644 > --- a/src/gallium/drivers/nouveau/nouveau_buffer.c > +++ b/src/gallium/drivers/nouveau/nouveau_buffer.c > @@ -163,7 +163,7 @@ nouveau_transfer_staging(struct nouveau_context *nv, > return tx->map; > } > > -/* Copies data from the resource into the the transfer's temporary GART > +/* Copies data from the resource into the transfer's temporary GART > * buffer. Also updates buf->data if present. > * > * Maybe just migrate to GART right away if we actually need to do this. */ > diff --git a/src/gallium/drivers/r300/compiler/radeon_dataflow.c b/src/gallium/drivers/r300/compiler/radeon_dataflow.c > index a8decac..03127eb 100644 > --- a/src/gallium/drivers/r300/compiler/radeon_dataflow.c > +++ b/src/gallium/drivers/r300/compiler/radeon_dataflow.c > @@ -850,7 +850,7 @@ static void init_get_readers_callback_data( > * of the loop it reads the value written by instruction 0 and in all other > * iterations it reads the value written by instruction 3. > * > - * @param read_cb This function will be called for for every instruction that > + * @param read_cb This function will be called for every instruction that > * has been determined to be a reader of writer. > * @param write_cb This function will be called for every instruction after > * writer. > diff --git a/src/gallium/drivers/r300/compiler/radeon_vert_fc.c b/src/gallium/drivers/r300/compiler/radeon_vert_fc.c > index 479101e..fded485 100644 > --- a/src/gallium/drivers/r300/compiler/radeon_vert_fc.c > +++ b/src/gallium/drivers/r300/compiler/radeon_vert_fc.c > @@ -134,7 +134,7 @@ static void lower_bgnloop( > } else { > fc_state->PredStack[fc_state->LoopDepth] = > fc_state->PredicateReg; > - /* Copy the the current predicate value to this loop's > + /* Copy the current predicate value to this loop's > * predicate register */ > > /* Use the old predicate value for src0 */ > diff --git a/src/gallium/drivers/svga/svga_format.c b/src/gallium/drivers/svga/svga_format.c > index 2fc920a..4662bef 100644 > --- a/src/gallium/drivers/svga/svga_format.c > +++ b/src/gallium/drivers/svga/svga_format.c > @@ -1916,7 +1916,7 @@ svga_format_size(SVGA3dSurfaceFormat format, > *block_width = format_cap_table[format].block_width; > *block_height = format_cap_table[format].block_height; > *bytes_per_block = format_cap_table[format].block_bytes; > - /* Make sure the the table entry was valid */ > + /* Make sure the table entry was valid */ > if (*block_width == 0) > debug_printf("Bad table entry for %s\n", svga_format_name(format)); > assert(*block_width); > diff --git a/src/gallium/drivers/swr/rasterizer/core/backend.h b/src/gallium/drivers/swr/rasterizer/core/backend.h > index 81dbe53..8a289c7 100644 > --- a/src/gallium/drivers/swr/rasterizer/core/backend.h > +++ b/src/gallium/drivers/swr/rasterizer/core/backend.h > @@ -208,13 +208,13 @@ INLINE void generateInputCoverage(const uint64_t *const coverageMask, uint32_t ( > > mask[0] = _mm256_set_epi8(-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, 0xC, 0x8, 0x4, 0x0, > -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, 0xC, 0x8, 0x4, 0x0); > - // pull out the the 8bit 4x2 coverage for samples 0-7 into the lower 32 bits of each 128bit lane > + // pull out the 8bit 4x2 coverage for samples 0-7 into the lower 32 bits of each 128bit lane > __m256i packedCoverage0 = _simd_shuffle_epi8(sampleCoverage[0], mask[0]); > > __m256i packedCoverage1; > if(T::MultisampleT::numSamples > 8) > { > - // pull out the the 8bit 4x2 coverage for samples 8-15 into the lower 32 bits of each 128bit lane > + // pull out the 8bit 4x2 coverage for samples 8-15 into the lower 32 bits of each 128bit lane > packedCoverage1 = _simd_shuffle_epi8(sampleCoverage[1], mask[0]); > } > > diff --git a/src/gallium/drivers/swr/rasterizer/core/state.h b/src/gallium/drivers/swr/rasterizer/core/state.h > index 5156c6b..511607a 100644 > --- a/src/gallium/drivers/swr/rasterizer/core/state.h > +++ b/src/gallium/drivers/swr/rasterizer/core/state.h > @@ -626,7 +626,7 @@ struct SWR_STREAMOUT_STATE > > // The stream masks specify which attributes are sent to which streams. > // These masks help the FE to setup the pPrimData buffer that is passed > - // the the Stream Output Shader (SOS) function. > + // the Stream Output Shader (SOS) function. > uint32_t streamMasks[MAX_SO_STREAMS]; > > // Number of attributes, including position, per vertex that are streamed out. > diff --git a/src/gallium/drivers/swr/rasterizer/core/threads.cpp b/src/gallium/drivers/swr/rasterizer/core/threads.cpp > index 17bf616..9cb4d0e 100644 > --- a/src/gallium/drivers/swr/rasterizer/core/threads.cpp > +++ b/src/gallium/drivers/swr/rasterizer/core/threads.cpp > @@ -437,7 +437,7 @@ void WorkOnFifoBE( > > for (uint32_t tileID : macroTiles) > { > - // Only work on tiles for for this numa node > + // Only work on tiles for this numa node > uint32_t x, y; > pDC->pTileMgr->getTileIndices(tileID, x, y); > if (((x ^ y) & numaMask) != numaNode) > diff --git a/src/gallium/drivers/vc4/kernel/vc4_validate_shaders.c b/src/gallium/drivers/vc4/kernel/vc4_validate_shaders.c > index 868a0ad..2f4f8e8 100644 > --- a/src/gallium/drivers/vc4/kernel/vc4_validate_shaders.c > +++ b/src/gallium/drivers/vc4/kernel/vc4_validate_shaders.c > @@ -163,7 +163,7 @@ check_tmu_write(uint64_t inst, > return false; > } > > - /* We assert that the the clamped address is the first > + /* We assert that the clamped address is the first > * argument, and the UBO base address is the second argument. > * This is arbitrary, but simpler than supporting flipping the > * two either way. > diff --git a/src/gallium/drivers/vc4/vc4_qir_schedule.c b/src/gallium/drivers/vc4/vc4_qir_schedule.c > index 4a1283c..c86df83 100644 > --- a/src/gallium/drivers/vc4/vc4_qir_schedule.c > +++ b/src/gallium/drivers/vc4/vc4_qir_schedule.c > @@ -407,7 +407,7 @@ choose_instruction(struct schedule_state *state) > } > > /* If we would block on the previously chosen node, but would > - * block less on this one, then then prefer it. > + * block less on this one, then prefer it. > */ > if (chosen->unblocked_time > state->time && > n->unblocked_time < chosen->unblocked_time) { > diff --git a/src/gallium/state_trackers/nine/device9.c b/src/gallium/state_trackers/nine/device9.c > index 20a0ce0..bb1735a 100644 > --- a/src/gallium/state_trackers/nine/device9.c > +++ b/src/gallium/state_trackers/nine/device9.c > @@ -236,7 +236,7 @@ NineDevice9_ctor( struct NineDevice9 *This, > NineUnknown_ConvertRefToBind(NineUnknown(This->state.rt[i])); > } > > - /* Initialize a dummy VBO to be used when a a vertex declaration does not > + /* Initialize a dummy VBO to be used when a vertex declaration does not > * specify all the inputs needed by vertex shader, on win default behavior > * is to pass 0,0,0,0 to the shader */ > { > diff --git a/src/gbm/main/gbm.c b/src/gbm/main/gbm.c > index 0f4657a..6be5b69 100644 > --- a/src/gbm/main/gbm.c > +++ b/src/gbm/main/gbm.c > @@ -361,7 +361,7 @@ gbm_bo_create(struct gbm_device *gbm, > * GBM_BO_IMPORT_EGL_IMAGE > * GBM_BO_IMPORT_FD > * > - * The the gbm bo shares the underlying pixels but its life-time is > + * The gbm bo shares the underlying pixels but its life-time is > * independent of the foreign object. > * > * \param gbm The gbm device returned from gbm_create_device() > diff --git a/src/gtest/src/gtest.cc b/src/gtest/src/gtest.cc > index 6de53dd..0f4aa93 100644 > --- a/src/gtest/src/gtest.cc > +++ b/src/gtest/src/gtest.cc > @@ -1461,7 +1461,7 @@ std::string CodePointToUtf8(UInt32 code_point) { > return str; > } > > -// The following two functions only make sense if the the system > +// The following two functions only make sense if the system > // uses UTF-16 for wide string encoding. All supported systems > // with 16 bit wchar_t (Windows, Cygwin, Symbian OS) do use UTF-16. > > diff --git a/src/mesa/drivers/dri/i965/brw_device_info.h b/src/mesa/drivers/dri/i965/brw_device_info.h > index 4e7f313..0869063 100644 > --- a/src/mesa/drivers/dri/i965/brw_device_info.h > +++ b/src/mesa/drivers/dri/i965/brw_device_info.h > @@ -73,7 +73,7 @@ struct brw_device_info > * In general, you can find shader thread maximums by looking at the "Maximum > * Number of Threads" field in the Intel PRM description of the 3DSTATE_VS, > * 3DSTATE_GS, 3DSTATE_HS, 3DSTATE_DS, and 3DSTATE_PS commands. URB entry > - * limits come from the "Number of URB Entries" field in the the > + * limits come from the "Number of URB Entries" field in the > * 3DSTATE_URB_VS command and friends. > * > * These fields are used to calculate the scratch space to allocate. The > diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp > index 17673f8..51f1634 100644 > --- a/src/mesa/drivers/dri/i965/brw_fs.cpp > +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp > @@ -1180,7 +1180,7 @@ fs_visitor::emit_general_interpolation(fs_reg *attr, const char *name, > > /* Data starts at suboffet 3 in 32-bit units (12 bytes), so it is not > * 64-bit aligned and the current implementation fails to read the > - * data properly. Instead, when there is is a double input varying, > + * data properly. Instead, when there is a double input varying, > * read it as vector of floats with twice the number of components. > */ > if (attr->type == BRW_REGISTER_TYPE_DF) { > diff --git a/src/mesa/drivers/dri/i965/brw_nir_opt_peephole_ffma.c b/src/mesa/drivers/dri/i965/brw_nir_opt_peephole_ffma.c > index 86fcdd4..14a9a0f 100644 > --- a/src/mesa/drivers/dri/i965/brw_nir_opt_peephole_ffma.c > +++ b/src/mesa/drivers/dri/i965/brw_nir_opt_peephole_ffma.c > @@ -113,7 +113,7 @@ get_mul_for_src(nir_alu_src *src, int num_components, > break; > > case nir_op_fmul: > - /* Only absorb a fmul into a ffma if the fmul is is only used in fadd > + /* Only absorb a fmul into a ffma if the fmul is only used in fadd > * operations. This prevents us from being too aggressive with our > * fusing which can actually lead to more instructions. > */ > diff --git a/src/mesa/drivers/dri/i965/brw_performance_monitor.c b/src/mesa/drivers/dri/i965/brw_performance_monitor.c > index a91c6e2..cb1ab4c 100644 > --- a/src/mesa/drivers/dri/i965/brw_performance_monitor.c > +++ b/src/mesa/drivers/dri/i965/brw_performance_monitor.c > @@ -1016,7 +1016,7 @@ wrap_bookend_bo(struct brw_context *brw) > } > > /* This is fairly arbitrary; the trade off is memory usage vs. extra overhead > - * from wrapping. On Gen7, 32768 should be enough for for 128 snapshots before > + * from wrapping. On Gen7, 32768 should be enough for 128 snapshots before > * wrapping (since each is 256 bytes). > */ > #define BOOKEND_BO_SIZE_BYTES 32768 > diff --git a/src/mesa/drivers/x11/xm_buffer.c b/src/mesa/drivers/x11/xm_buffer.c > index f6e1427..4d52169 100644 > --- a/src/mesa/drivers/x11/xm_buffer.c > +++ b/src/mesa/drivers/x11/xm_buffer.c > @@ -451,7 +451,7 @@ xmesa_MapRenderbuffer(struct gl_context *ctx, > > assert(xrb->pixmap); > > - /* Install error handler for XGetImage() in case the the window > + /* Install error handler for XGetImage() in case the window > * isn't mapped. If we fail we'll create a temporary XImage. > */ > mesaXErrorFlag = 0; > diff --git a/src/mesa/main/texobj.c b/src/mesa/main/texobj.c > index ed630bd..722549d 100644 > --- a/src/mesa/main/texobj.c > +++ b/src/mesa/main/texobj.c > @@ -1196,7 +1196,7 @@ invalidate_tex_image_error_check(struct gl_context *ctx, GLuint texture, > * glCreateTextures should throw errors if target = 0. This is not exposed to > * the rest of Mesa to encourage Mesa internals to use nameless textures, > * which do not require expensive hash lookups. > - * \param target either 0 or a a valid / error-checked texture target enum > + * \param target either 0 or a valid / error-checked texture target enum > */ > static void > create_textures(struct gl_context *ctx, GLenum target, > diff --git a/src/mesa/program/ir_to_mesa.cpp b/src/mesa/program/ir_to_mesa.cpp > index 3a5f058..cf47c0d 100644 > --- a/src/mesa/program/ir_to_mesa.cpp > +++ b/src/mesa/program/ir_to_mesa.cpp > @@ -1975,7 +1975,7 @@ ir_to_mesa_visitor::visit(ir_texture *ir) > ir->coordinate->accept(this); > > /* Put our coords in a temp. We'll need to modify them for shadow, > - * projection, or LOD, so the only case we'd use it as is is if > + * projection, or LOD, so the only case we'd use it as-is is if > * we're doing plain old texturing. Mesa IR optimization should > * handle cleaning up our mess in that case. > */ > diff --git a/src/mesa/state_tracker/st_cb_fbo.c b/src/mesa/state_tracker/st_cb_fbo.c > index a53b95a..9801b1f 100644 > --- a/src/mesa/state_tracker/st_cb_fbo.c > +++ b/src/mesa/state_tracker/st_cb_fbo.c > @@ -266,7 +266,7 @@ st_new_renderbuffer(struct gl_context *ctx, GLuint name) > > > /** > - * Allocate a renderbuffer for a an on-screen window (not a user-created > + * Allocate a renderbuffer for an on-screen window (not a user-created > * renderbuffer). The window system code determines the format. > */ > struct gl_renderbuffer * > diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp > index 9de603c..07ec91a 100644 > --- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp > +++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp > @@ -3877,7 +3877,7 @@ glsl_to_tgsi_visitor::visit(ir_texture *ir) > ir->coordinate->accept(this); > > /* Put our coords in a temp. We'll need to modify them for shadow, > - * projection, or LOD, so the only case we'd use it as is is if > + * projection, or LOD, so the only case we'd use it as-is is if > * we're doing plain old texturing. The optimization passes on > * glsl_to_tgsi_visitor should handle cleaning up our mess in that case. > */ > @@ -5832,7 +5832,7 @@ emit_wpos(struct st_context *st, > * > * The bias of the y-coordinate depends on whether y-inversion takes place > * (adjY[1]) or not (adjY[0]), which is in turn dependent on whether we are > - * drawing to an FBO (causes additional inversion), and whether the the pipe > + * drawing to an FBO (causes additional inversion), and whether the pipe > * driver origin and the requested origin differ (the latter condition is > * stored in the 'invert' variable). > * > diff --git a/src/mesa/state_tracker/st_mesa_to_tgsi.c b/src/mesa/state_tracker/st_mesa_to_tgsi.c > index f7507e5..b989257 100644 > --- a/src/mesa/state_tracker/st_mesa_to_tgsi.c > +++ b/src/mesa/state_tracker/st_mesa_to_tgsi.c > @@ -830,7 +830,7 @@ emit_wpos(struct st_context *st, > * > * The bias of the y-coordinate depends on whether y-inversion takes place > * (adjY[1]) or not (adjY[0]), which is in turn dependent on whether we are > - * drawing to an FBO (causes additional inversion), and whether the the pipe > + * drawing to an FBO (causes additional inversion), and whether the pipe > * driver origin and the requested origin differ (the latter condition is > * stored in the 'invert' variable). > * > -- > 2.8.1.372.g9612035 > > _______________________________________________ > mesa-dev mailing list > <a href="mailto:mesa-dev@lists.freedesktop.org">mesa-dev@lists.freedesktop.org</a> > <a href="https://lists.freedesktop.org/mailman/listinfo/mesa-dev">https://lists.freedesktop.org/mailman/listinfo/mesa-dev</a>