<div dir="ltr"><div>I don't know what I think about re-using the VB setup in blorp, but these two patches are a very nice cleanup in their own right. 1 and 2 are<br><br></div>Reviewed-by: Jason Ekstrand <<a href="mailto:jason@jlekstrand.net">jason@jlekstrand.net</a>><br></div><div class="gmail_extra"><br><div class="gmail_quote">On Thu, Jun 23, 2016 at 12:16 PM, Topi Pohjolainen <span dir="ltr"><<a href="mailto:topi.pohjolainen@intel.com" target="_blank">topi.pohjolainen@intel.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">On gen >= 8 one doesn't provide ending address but number of bytes<br>
available. This is relative to the given offset.<br>
<br>
Signed-off-by: Topi Pohjolainen <<a href="mailto:topi.pohjolainen@intel.com">topi.pohjolainen@intel.com</a>><br>
---<br>
src/mesa/drivers/dri/i965/brw_draw_upload.c | 34 +++++++++++++++++++----<br>
src/mesa/drivers/dri/i965/gen8_draw_upload.c | 41 ++++++++++++----------------<br>
2 files changed, 46 insertions(+), 29 deletions(-)<br>
<br>
diff --git a/src/mesa/drivers/dri/i965/brw_draw_upload.c b/src/mesa/drivers/dri/i965/brw_draw_upload.c<br>
index 623e4ab..fdb1b35 100644<br>
--- a/src/mesa/drivers/dri/i965/brw_draw_upload.c<br>
+++ b/src/mesa/drivers/dri/i965/brw_draw_upload.c<br>
@@ -708,7 +708,9 @@ brw_emit_vertex_buffer_state(struct brw_context *brw,<br>
struct gl_context *ctx = &brw->ctx;<br>
uint32_t dw0;<br>
<br>
- if (brw->gen >= 6) {<br>
+ if (brw->gen >= 8) {<br>
+ dw0 = buffer_nr << GEN6_VB0_INDEX_SHIFT;<br>
+ } else if (brw->gen >= 6) {<br>
dw0 = (buffer_nr << GEN6_VB0_INDEX_SHIFT) |<br>
(step_rate ? GEN6_VB0_ACCESS_INSTANCEDATA<br>
: GEN6_VB0_ACCESS_VERTEXDATA);<br>
@@ -721,15 +723,35 @@ brw_emit_vertex_buffer_state(struct brw_context *brw,<br>
if (brw->gen >= 7)<br>
dw0 |= GEN7_VB0_ADDRESS_MODIFYENABLE;<br>
<br>
- if (brw->gen == 7)<br>
+ switch (brw->gen) {<br>
+ case 7:<br>
dw0 |= GEN7_MOCS_L3 << 16;<br>
+ break;<br>
+ case 8:<br>
+ dw0 |= BDW_MOCS_WB << 16;<br>
+ break;<br>
+ case 9:<br>
+ dw0 |= SKL_MOCS_WB << 16;<br>
+ break;<br>
+ }<br>
<br>
WARN_ONCE(stride >= (brw->gen >= 5 ? 2048 : 2047),<br>
"VBO stride %d too large, bad rendering may occur\n",<br>
stride);<br>
OUT_BATCH(dw0 | (stride << BRW_VB0_PITCH_SHIFT));<br>
- OUT_RELOC(bo, I915_GEM_DOMAIN_VERTEX, 0, start_offset);<br>
- if (brw->gen >= 5) {<br>
+ if (brw->gen >= 8) {<br>
+ OUT_RELOC64(bo, I915_GEM_DOMAIN_VERTEX, 0, start_offset);<br>
+ /* From the BSpec: 3D Pipeline Stages - 3D Pipeline Geometry -<br>
+ * Vertex Fetch (VF) Stage - State<br>
+ *<br>
+ * Instead of "VBState.StartingBufferAddress + VBState.MaxIndex x<br>
+ * VBState.BufferPitch", the address of the byte immediately beyond the<br>
+ * last valid byte of the buffer is determined by<br>
+ * "VBState.StartingBufferAddress + VBState.BufferSize".<br>
+ */<br>
+ OUT_BATCH(end_offset - start_offset);<br>
+ } else if (brw->gen >= 5) {<br>
+ OUT_RELOC(bo, I915_GEM_DOMAIN_VERTEX, 0, start_offset);<br>
/* From the BSpec: 3D Pipeline Stages - 3D Pipeline Geometry -<br>
* Vertex Fetch (VF) Stage - State<br>
*<br>
@@ -739,10 +761,12 @@ brw_emit_vertex_buffer_state(struct brw_context *brw,<br>
* "VBState.EndAddress + 1".<br>
*/<br>
OUT_RELOC(bo, I915_GEM_DOMAIN_VERTEX, 0, end_offset - 1);<br>
+ OUT_BATCH(step_rate);<br>
} else {<br>
+ OUT_RELOC(bo, I915_GEM_DOMAIN_VERTEX, 0, start_offset);<br>
OUT_BATCH(0);<br>
+ OUT_BATCH(step_rate);<br>
}<br>
- OUT_BATCH(step_rate);<br>
<br>
return __map;<br>
}<br>
diff --git a/src/mesa/drivers/dri/i965/gen8_draw_upload.c b/src/mesa/drivers/dri/i965/gen8_draw_upload.c<br>
index 5b3f673..d2c7853 100644<br>
--- a/src/mesa/drivers/dri/i965/gen8_draw_upload.c<br>
+++ b/src/mesa/drivers/dri/i965/gen8_draw_upload.c<br>
@@ -52,7 +52,6 @@ static void<br>
gen8_emit_vertices(struct brw_context *brw)<br>
{<br>
struct gl_context *ctx = &brw->ctx;<br>
- uint32_t mocs_wb = brw->gen >= 9 ? SKL_MOCS_WB : BDW_MOCS_WB;<br>
bool uses_edge_flag;<br>
<br>
brw_prepare_vertices(brw);<br>
@@ -141,35 +140,29 @@ gen8_emit_vertices(struct brw_context *brw)<br>
BEGIN_BATCH(1 + 4 * nr_buffers);<br>
OUT_BATCH((_3DSTATE_VERTEX_BUFFERS << 16) | (4 * nr_buffers - 1));<br>
for (unsigned i = 0; i < brw->vb.nr_buffers; i++) {<br>
- struct brw_vertex_buffer *buffer = &brw->vb.buffers[i];<br>
- uint32_t dw0 = 0;<br>
-<br>
- dw0 |= i << GEN6_VB0_INDEX_SHIFT;<br>
- dw0 |= GEN7_VB0_ADDRESS_MODIFYENABLE;<br>
- dw0 |= buffer->stride << BRW_VB0_PITCH_SHIFT;<br>
- dw0 |= mocs_wb << 16;<br>
-<br>
- OUT_BATCH(dw0);<br>
- OUT_RELOC64(buffer->bo, I915_GEM_DOMAIN_VERTEX, 0, buffer->offset);<br>
- OUT_BATCH(buffer->size);<br>
+ const struct brw_vertex_buffer *buffer = &brw->vb.buffers[i];<br>
+ EMIT_VERTEX_BUFFER_STATE(brw, i, buffer->bo,<br>
+ buffer->offset,<br>
+ buffer->offset + buffer->size,<br>
+ buffer->stride, 0 /* unused */);<br>
}<br>
<br>
if (uses_draw_params) {<br>
- OUT_BATCH(brw->vb.nr_buffers << GEN6_VB0_INDEX_SHIFT |<br>
- GEN7_VB0_ADDRESS_MODIFYENABLE |<br>
- mocs_wb << 16);<br>
- OUT_RELOC64(brw->draw.draw_params_bo, I915_GEM_DOMAIN_VERTEX, 0,<br>
- brw->draw.draw_params_offset);<br>
- OUT_BATCH(brw->draw.draw_params_bo->size);<br>
+ EMIT_VERTEX_BUFFER_STATE(brw, brw->vb.nr_buffers,<br>
+ brw->draw.draw_params_bo,<br>
+ brw->draw.draw_params_offset,<br>
+ brw->draw.draw_params_bo->size,<br>
+ 0 /* stride */,<br>
+ 0 /* unused */);<br>
}<br>
<br>
if (brw->vs.prog_data->uses_drawid) {<br>
- OUT_BATCH((brw->vb.nr_buffers + 1) << GEN6_VB0_INDEX_SHIFT |<br>
- GEN7_VB0_ADDRESS_MODIFYENABLE |<br>
- mocs_wb << 16);<br>
- OUT_RELOC64(brw->draw.draw_id_bo, I915_GEM_DOMAIN_VERTEX, 0,<br>
- brw->draw.draw_id_offset);<br>
- OUT_BATCH(brw->draw.draw_id_bo->size);<br>
+ EMIT_VERTEX_BUFFER_STATE(brw, brw->vb.nr_buffers + 1,<br>
+ brw->draw.draw_id_bo,<br>
+ brw->draw.draw_id_offset,<br>
+ brw->draw.draw_id_bo->size,<br>
+ 0 /* stride */,<br>
+ 0 /* unused */);<br>
}<br>
ADVANCE_BATCH();<br>
}<br>
<span class="HOEnZb"><font color="#888888">--<br>
2.5.5<br>
<br>
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</font></span></blockquote></div><br></div>