<div dir="ltr">Hooray! \o/ </div><div class="gmail_extra"> <div class="gmail_quote">On Thu, Jun 23, 2016 at 12:17 PM, Topi Pohjolainen <<a href="mailto:topi.pohjolainen@intel.com" target="_blank">topi.pohjolainen@intel.com</a>> wrote: <blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Signed-off-by: Topi Pohjolainen <<a href="mailto:topi.pohjolainen@intel.com">topi.pohjolainen@intel.com</a>> --- src/mesa/drivers/dri/i965/brw_blorp.c | 17 ++--------- src/mesa/drivers/dri/i965/brw_blorp.h | 15 --------- src/mesa/drivers/dri/i965/gen6_blorp.c | 56 +--------------------------------- src/mesa/drivers/dri/i965/gen7_blorp.c | 41 +------------------------ src/mesa/drivers/dri/i965/gen8_blorp.c | 28 +++++------------ 5 files changed, 12 insertions(+), 145 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c b/src/mesa/drivers/dri/i965/brw_blorp.c index 4d6c0ba..04c10b6 100644 --- a/src/mesa/drivers/dri/i965/brw_blorp.c +++ b/src/mesa/drivers/dri/i965/brw_blorp.c @@ -187,17 +187,8 @@ brw_blorp_compile_nir_shader(struct brw_context *brw, struct nir_shader *nir, struct brw_wm_prog_data wm_prog_data; memset(&wm_prog_data, 0, sizeof(wm_prog_data)); - /* We set up the params array but instead of making them point at actual - * GL constant values, they just store an index. This is just fine as the - * backend compiler never looks at the contents of the pointers, it just - * re-arranges them for us. - */ - const union gl_constant_value *param[BRW_BLORP_NUM_PUSH_CONSTANT_DWORDS]; - for (unsigned i = 0; i < ARRAY_SIZE(param); i++) - param[i] = (const union gl_constant_value *)(intptr_t)i; - - wm_prog_data.base.nr_params = BRW_BLORP_NUM_PUSH_CONSTANT_DWORDS; - wm_prog_data.base.param = param; + wm_prog_data.base.nr_params = 0; + wm_prog_data.base.param = NULL; /* BLORP always just uses the first two binding table entries */ wm_prog_data.binding_table.render_target_start = 0; @@ -235,9 +226,7 @@ brw_blorp_compile_nir_shader(struct brw_context *brw, struct nir_shader *nir, prog_data->num_varying_inputs = wm_prog_data.num_varying_inputs; prog_data->inputs_read = nir->info.inputs_read; - prog_data->nr_params = wm_prog_data.base.nr_params; - for (unsigned i = 0; i < ARRAY_SIZE(param); i++) - prog_data->param[i] = (uintptr_t)wm_prog_data.base.param[i]; + assert(wm_prog_data.base.nr_params == 0); return program; } diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h b/src/mesa/drivers/dri/i965/brw_blorp.h index 91d111e..d3fc713 100644 --- a/src/mesa/drivers/dri/i965/brw_blorp.h +++ b/src/mesa/drivers/dri/i965/brw_blorp.h @@ -233,13 +233,6 @@ struct brw_blorp_wm_inputs uint32_t pad[7]; }; -#define BRW_BLORP_NUM_PUSH_CONSTANT_DWORDS \ - (sizeof(struct brw_blorp_wm_inputs) / 4) - -/* Every 32 bytes of push constant data constitutes one GEN register. */ -static const unsigned int BRW_BLORP_NUM_PUSH_CONST_REGS = - sizeof(struct brw_blorp_wm_inputs) / 32; - struct brw_blorp_prog_data { bool dispatch_8; @@ -263,14 +256,6 @@ struct brw_blorp_prog_data uint32_t flat_inputs; unsigned num_varying_inputs; GLbitfield64 inputs_read; - - /* The compiler will re-arrange push constants and store the upload order - * here. Given an index 'i' in the final upload buffer, param[i] gives the - * index in the uniform store. In other words, the value to be uploaded can - * be found by brw_blorp_params::wm_push_consts[param[i]]. - */ - uint8_t nr_params; - uint8_t param[BRW_BLORP_NUM_PUSH_CONSTANT_DWORDS]; }; inline unsigned diff --git a/src/mesa/drivers/dri/i965/gen6_blorp.c b/src/mesa/drivers/dri/i965/gen6_blorp.c index 8b6b8f9..c38952e 100644 --- a/src/mesa/drivers/dri/i965/gen6_blorp.c +++ b/src/mesa/drivers/dri/i965/gen6_blorp.c @@ -350,26 +350,6 @@ gen6_blorp_emit_cc_state_pointers(struct brw_context *brw, ADVANCE_BATCH(); } - -/* WM push constants */ -uint32_t -gen6_blorp_emit_wm_constants(struct brw_context *brw, - const struct brw_blorp_params *params) -{ - uint32_t wm_push_const_offset; - - uint32_t *constants = brw_state_batch(brw, AUB_TRACE_WM_CONSTANTS, - sizeof(params->wm_inputs), - 32, &wm_push_const_offset); - - const uint32_t *push_consts = (const uint32_t *)&params->wm_inputs; - for (unsigned i = 0; i < params->wm_prog_data->nr_params; i++) - constants[i] = push_consts[params->wm_prog_data->param[i]]; - - return wm_push_const_offset; -} - - /* SURFACE_STATE for renderbuffer or texture surface (see * brw_update_renderbuffer_surface and brw_update_texture_surface) */ @@ -755,32 +735,6 @@ gen6_blorp_emit_wm_config(struct brw_context *brw, ADVANCE_BATCH(); } - -static void -gen6_blorp_emit_constant_ps(struct brw_context *brw, - const struct brw_blorp_params *params, - uint32_t wm_push_const_offset) -{ - /* Make sure the push constants fill an exact integer number of - * registers. - */ - STATIC_ASSERT(sizeof(struct brw_blorp_wm_inputs) % 32 == 0); - - /* There must be at least one register worth of push constant data. */ - assert(BRW_BLORP_NUM_PUSH_CONST_REGS > 0); - - /* Enable push constant buffer 0. */ - BEGIN_BATCH(5); - OUT_BATCH(_3DSTATE_CONSTANT_PS << 16 | - GEN6_CONSTANT_BUFFER_0_ENABLE | - (5 - 2)); - OUT_BATCH(wm_push_const_offset + (BRW_BLORP_NUM_PUSH_CONST_REGS - 1)); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - ADVANCE_BATCH(); -} - static void gen6_blorp_emit_constant_ps_disable(struct brw_context *brw, const struct brw_blorp_params *params) @@ -1050,7 +1004,6 @@ gen6_blorp_exec(struct brw_context *brw, uint32_t cc_blend_state_offset = 0; uint32_t cc_state_offset = 0; uint32_t depthstencil_offset; - uint32_t wm_push_const_offset = 0; uint32_t wm_bind_bo_offset = 0; /* Emit workaround flushes when we switch from drawing to blorping. */ @@ -1075,10 +1028,6 @@ gen6_blorp_exec(struct brw_context *brw, uint32_t wm_surf_offset_renderbuffer; uint32_t wm_surf_offset_texture = 0; - if (params->wm_prog_data->nr_params) { - wm_push_const_offset = gen6_blorp_emit_wm_constants(brw, params); - } - intel_miptree_used_for_rendering(params-><a href="http://dst.mt" rel="noreferrer" target="_blank">dst.mt</a>); wm_surf_offset_renderbuffer = gen6_blorp_emit_surface_state(brw, params, &params->dst, @@ -1104,10 +1053,7 @@ gen6_blorp_exec(struct brw_context *brw, gen6_blorp_emit_gs_disable(brw, params); gen6_blorp_emit_clip_disable(brw); gen6_blorp_emit_sf_config(brw, params); - if (params->wm_prog_data && params->wm_prog_data->nr_params) - gen6_blorp_emit_constant_ps(brw, params, wm_push_const_offset); - else - gen6_blorp_emit_constant_ps_disable(brw, params); + gen6_blorp_emit_constant_ps_disable(brw, params); gen6_blorp_emit_wm_config(brw, params); if (params->wm_prog_data) gen6_blorp_emit_binding_table_pointers(brw, wm_bind_bo_offset); diff --git a/src/mesa/drivers/dri/i965/gen7_blorp.c b/src/mesa/drivers/dri/i965/gen7_blorp.c index 4215775..b71224a 100644 --- a/src/mesa/drivers/dri/i965/gen7_blorp.c +++ b/src/mesa/drivers/dri/i965/gen7_blorp.c @@ -552,9 +552,6 @@ gen7_blorp_emit_ps_config(struct brw_context *brw, if (brw->is_haswell) dw4 |= SET_FIELD(1, HSW_PS_SAMPLE_MASK); /* 1 sample for now */ if (params->wm_prog_data) { - if (params->wm_prog_data->nr_params) - dw4 |= GEN7_PS_PUSH_CONSTANT_ENABLE; - dw5 |= prog_data->first_curbe_grf_0 << GEN7_PS_DISPATCH_START_GRF_SHIFT_0; dw5 |= prog_data->first_curbe_grf_2 << GEN7_PS_DISPATCH_START_GRF_SHIFT_2; @@ -613,34 +610,6 @@ gen7_blorp_emit_sampler_state_pointers_ps(struct brw_context *brw, ADVANCE_BATCH(); } - -void -gen7_blorp_emit_constant_ps(struct brw_context *brw, - uint32_t wm_push_const_offset) -{ - const uint8_t mocs = GEN7_MOCS_L3; - - /* Make sure the push constants fill an exact integer number of - * registers. - */ - STATIC_ASSERT(sizeof(struct brw_blorp_wm_inputs) % 32 == 0); - - /* There must be at least one register worth of push constant data. */ - assert(BRW_BLORP_NUM_PUSH_CONST_REGS > 0); - - /* Enable push constant buffer 0. */ - BEGIN_BATCH(7); - OUT_BATCH(_3DSTATE_CONSTANT_PS << 16 | - (7 - 2)); - OUT_BATCH(BRW_BLORP_NUM_PUSH_CONST_REGS); - OUT_BATCH(0); - OUT_BATCH(wm_push_const_offset | mocs); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - ADVANCE_BATCH(); -} - void gen7_blorp_emit_constant_ps_disable(struct brw_context *brw) { @@ -833,7 +802,6 @@ gen7_blorp_exec(struct brw_context *brw, uint32_t cc_blend_state_offset = 0; uint32_t cc_state_offset = 0; uint32_t depthstencil_offset; - uint32_t wm_push_const_offset = 0; uint32_t wm_bind_bo_offset = 0; brw_upload_state_base_address(brw); @@ -858,10 +826,6 @@ gen7_blorp_exec(struct brw_context *brw, uint32_t wm_surf_offset_renderbuffer; uint32_t wm_surf_offset_texture = 0; - if (params->wm_prog_data->nr_params) { - wm_push_const_offset = gen6_blorp_emit_wm_constants(brw, params); - } - intel_miptree_used_for_rendering(params-><a href="http://dst.mt" rel="noreferrer" target="_blank">dst.mt</a>); wm_surf_offset_renderbuffer = gen7_blorp_emit_surface_state(brw, &params->dst, @@ -891,10 +855,7 @@ gen7_blorp_exec(struct brw_context *brw, if (params->wm_prog_data) gen7_blorp_emit_binding_table_pointers_ps(brw, wm_bind_bo_offset); - if (params->wm_prog_data && params->wm_prog_data->nr_params) - gen7_blorp_emit_constant_ps(brw, wm_push_const_offset); - else - gen7_blorp_emit_constant_ps_disable(brw); + gen7_blorp_emit_constant_ps_disable(brw); if (params-><a href="http://src.mt" rel="noreferrer" target="_blank">src.mt</a>) { const uint32_t sampler_offset = diff --git a/src/mesa/drivers/dri/i965/gen8_blorp.c b/src/mesa/drivers/dri/i965/gen8_blorp.c index 553c637..a3216f5 100644 --- a/src/mesa/drivers/dri/i965/gen8_blorp.c +++ b/src/mesa/drivers/dri/i965/gen8_blorp.c @@ -402,9 +402,6 @@ gen8_blorp_emit_ps_config(struct brw_context *brw, dw3 |= 1 << GEN7_PS_BINDING_TABLE_ENTRY_COUNT_SHIFT; /* One surface */ } - if (prog_data->nr_params) - dw6 |= GEN7_PS_PUSH_CONSTANT_ENABLE; - dw7 |= prog_data->first_curbe_grf_0 << GEN7_PS_DISPATCH_START_GRF_SHIFT_0; dw7 |= prog_data->first_curbe_grf_2 << GEN7_PS_DISPATCH_START_GRF_SHIFT_2; @@ -577,9 +574,7 @@ gen8_blorp_emit_depth_stencil_state(struct brw_context *brw, } static void -gen8_blorp_emit_constant_ps(struct brw_context *brw, - const struct brw_blorp_params *params, - uint32_t wm_push_const_offset) +gen8_blorp_emit_disable_constant_ps(struct brw_context *brw) { const int dwords = brw->gen >= 8 ? 11 : 7; BEGIN_BATCH(dwords); @@ -587,9 +582,9 @@ gen8_blorp_emit_constant_ps(struct brw_context *brw, if (brw->gen >= 9) { OUT_BATCH(0); - OUT_BATCH(params->wm_prog_data->nr_params); + OUT_BATCH(0); } else { - OUT_BATCH(params->wm_prog_data->nr_params); + OUT_BATCH(0); OUT_BATCH(0); } @@ -598,19 +593,12 @@ gen8_blorp_emit_constant_ps(struct brw_context *brw, OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); - - if (params->wm_prog_data->nr_params) { - OUT_RELOC64(brw-><a href="http://batch.bo" rel="noreferrer" target="_blank">batch.bo</a>, I915_GEM_DOMAIN_RENDER, 0, - wm_push_const_offset); - } else { - OUT_BATCH(0); - OUT_BATCH(0); - } - + OUT_BATCH(0); + OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); } else { - OUT_BATCH(wm_push_const_offset); + OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); @@ -704,9 +692,7 @@ gen8_blorp_exec(struct brw_context *brw, const struct brw_blorp_params *params) gen8_blorp_emit_disable_constant_state(brw, _3DSTATE_CONSTANT_DS); gen8_blorp_emit_disable_constant_state(brw, _3DSTATE_CONSTANT_GS); - const uint32_t wm_push_const_offset = params->wm_prog_data->nr_params ? - gen6_blorp_emit_wm_constants(brw, params) : 0; - gen8_blorp_emit_constant_ps(brw, params, wm_push_const_offset); + gen8_blorp_emit_disable_constant_ps(brw); wm_bind_bo_offset = gen8_blorp_emit_surface_states(brw, params); gen8_blorp_emit_disable_binding_table(brw, -- 2.5.5 _______________________________________________ mesa-dev mailing list <a href="mailto:mesa-dev@lists.freedesktop.org">mesa-dev@lists.freedesktop.org</a> <a href="https://lists.freedesktop.org/mailman/listinfo/mesa-dev" rel="noreferrer" target="_blank">https://lists.freedesktop.org/mailman/listinfo/mesa-dev</a> </blockquote></div> </div>