<div dir="ltr"><br><div class="gmail_extra"><br><div class="gmail_quote">On Thu, Jun 30, 2016 at 11:56 PM, Pohjolainen, Topi <span dir="ltr"><<a href="mailto:topi.pohjolainen@intel.com" target="_blank">topi.pohjolainen@intel.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><span class="">On Wed, Jun 29, 2016 at 05:37:33PM -0700, Jason Ekstrand wrote:<br>
> We put all of the code for fake IMS together. This requires moving a bit<br>
> of the program key setup code further down so that it gets the right values<br>
> out of the final surface.<br>
> ---<br>
> src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 71 +++++++++++++---------------<br>
> 1 file changed, 34 insertions(+), 37 deletions(-)<br>
><br>
> diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp<br>
> index 9a0b9bb..c253412 100644<br>
> --- a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp<br>
> +++ b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp<br>
> @@ -1695,28 +1695,6 @@ brw_blorp_blit_miptrees(struct brw_context *brw,<br>
> unreachable("Unrecognized blorp format");<br>
> }<br>
><br>
> - if (brw->gen > 6) {<br>
> - /* Gen7's rendering hardware only supports the IMS layout for depth and<br>
> - * stencil render targets. Blorp always maps its destination surface as<br>
> - * a color render target (even if it's actually a depth or stencil<br>
> - * buffer). So if the destination is IMS, we'll have to map it as a<br>
> - * single-sampled texture and interleave the samples ourselves.<br>
> - */<br>
> - if (dst_mt->msaa_layout == INTEL_MSAA_LAYOUT_IMS) {<br>
<br>
</span>This should have been switched to isl enum in patch 12 (Use isl_msaa_layout<br>
instead of intel_msaa_layout)?<br>
<div><div class="h5"><br>
> - params.dst.surf.samples = 1;<br>
> - params.dst.surf.msaa_layout = ISL_MSAA_LAYOUT_NONE;<br>
> - }<br>
> - }<br>
> -<br>
> - if (params.src.surf.samples > 0 && params.dst.surf.samples > 1) {<br>
> - /* We are blitting from a multisample buffer to a multisample buffer, so<br>
> - * we must preserve samples within a pixel. This means we have to<br>
> - * arrange for the WM program to run once per sample rather than once<br>
> - * per pixel.<br>
> - */<br>
> - wm_prog_key.persample_msaa_dispatch = true;<br>
> - }<br>
> -<br>
> /* Scaled blitting or not. */<br>
> wm_prog_key.blit_scaled =<br>
> ((dst_x1 - dst_x0) == (src_x1 - src_x0) &&<br>
> @@ -1756,20 +1734,8 @@ brw_blorp_blit_miptrees(struct brw_context *brw,<br>
> wm_prog_key.src_samples = src_mt->num_samples;<br>
> wm_prog_key.dst_samples = dst_mt->num_samples;<br>
><br>
> - /* tex_samples and rt_samples are the sample counts that are set up in<br>
> - * SURFACE_STATE.<br>
> - */<br>
> - wm_prog_key.tex_samples = params.src.surf.samples;<br>
> - wm_prog_key.rt_samples = params.dst.surf.samples;<br>
> -<br>
> wm_prog_key.tex_aux_usage = params.src.aux_usage;<br>
><br>
> - /* tex_layout and rt_layout indicate the MSAA layout the GPU pipeline will<br>
> - * use to access the source and destination surfaces.<br>
> - */<br>
> - wm_prog_key.tex_layout = params.src.surf.msaa_layout;<br>
> - wm_prog_key.rt_layout = params.dst.surf.msaa_layout;<br>
> -<br>
> /* src_layout and dst_layout indicate the true MSAA layout used by src and<br>
> * dst.<br>
> */<br>
> @@ -1805,7 +1771,7 @@ brw_blorp_blit_miptrees(struct brw_context *brw,<br>
> params.wm_push_consts.src_z = 0;<br>
> }<br>
><br>
> - if (params.dst.surf.samples <= 1 && dst_mt->num_samples > 1) {<br>
> + if (brw->gen > 6 && dst_mt->msaa_layout == INTEL_MSAA_LAYOUT_IMS) {<br>
<br>
</div></div>And here we should have ISL enum, right?<br></blockquote><div><br></div><div>I *think* you are correct that it could be changed. However, mt->msaa_layout is the "unmodified" version so I'm a bit paranoid about changing it. It will get converted to ISL eventually; If not in this series then in the next one.<br></div><div>--Jason<br></div><div> </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
<div><div class="h5"><br>
> /* We must expand the rectangle we send through the rendering pipeline,<br>
> * to account for the fact that we are mapping the destination region as<br>
> * single-sampled when it is in fact multisampled. We must also align<br>
> @@ -1818,8 +1784,8 @@ brw_blorp_blit_miptrees(struct brw_context *brw,<br>
> * If it's UMS, then we have no choice but to set up the rendering<br>
> * pipeline as multisampled.<br>
> */<br>
> - assert(dst_mt->msaa_layout == INTEL_MSAA_LAYOUT_IMS);<br>
> - switch (dst_mt->num_samples) {<br>
> + assert(params.dst.surf.msaa_layout = ISL_MSAA_LAYOUT_INTERLEAVED);<br>
> + switch (params.dst.surf.samples) {<br>
> case 2:<br>
> params.x0 = ROUND_DOWN_TO(params.x0 * 2, 4);<br>
> params.y0 = ROUND_DOWN_TO(params.y0, 4);<br>
> @@ -1847,6 +1813,16 @@ brw_blorp_blit_miptrees(struct brw_context *brw,<br>
> default:<br>
> unreachable("Unrecognized sample count in brw_blorp_blit_params ctor");<br>
> }<br>
> +<br>
> + /* Gen7's rendering hardware only supports the IMS layout for depth and<br>
> + * stencil render targets. Blorp always maps its destination surface as<br>
> + * a color render target (even if it's actually a depth or stencil<br>
> + * buffer). So if the destination is IMS, we'll have to map it as a<br>
> + * single-sampled texture and interleave the samples ourselves.<br>
> + */<br>
> + params.dst.surf.samples = 1;<br>
> + params.dst.surf.msaa_layout = ISL_MSAA_LAYOUT_NONE;<br>
> +<br>
> wm_prog_key.use_kill = true;<br>
> }<br>
><br>
> @@ -1950,6 +1926,27 @@ brw_blorp_blit_miptrees(struct brw_context *brw,<br>
> params.src.y_offset /= 2;<br>
> }<br>
><br>
> + /* tex_samples and rt_samples are the sample counts that are set up in<br>
> + * SURFACE_STATE.<br>
> + */<br>
> + wm_prog_key.tex_samples = params.src.surf.samples;<br>
> + wm_prog_key.rt_samples = params.dst.surf.samples;<br>
> +<br>
> + /* tex_layout and rt_layout indicate the MSAA layout the GPU pipeline will<br>
> + * use to access the source and destination surfaces.<br>
> + */<br>
> + wm_prog_key.tex_layout = params.src.surf.msaa_layout;<br>
> + wm_prog_key.rt_layout = params.dst.surf.msaa_layout;<br>
> +<br>
> + if (params.src.surf.samples > 0 && params.dst.surf.samples > 1) {<br>
> + /* We are blitting from a multisample buffer to a multisample buffer, so<br>
> + * we must preserve samples within a pixel. This means we have to<br>
> + * arrange for the WM program to run once per sample rather than once<br>
> + * per pixel.<br>
> + */<br>
> + wm_prog_key.persample_msaa_dispatch = true;<br>
> + }<br>
> +<br>
> brw_blorp_get_blit_kernel(brw, ¶ms, &wm_prog_key);<br>
><br>
> params.src.swizzle = src_swizzle;<br>
> --<br>
> 2.5.0.400.gff86faf<br>
><br>
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</blockquote></div><br></div></div>