<div dir="ltr"><div class="gmail_default" style="font-family:verdana,sans-serif;font-size:small"><br></div><div class="gmail_extra"><br><div class="gmail_quote">On Mon, Aug 8, 2016 at 12:30 PM, Lionel Landwerlin <span dir="ltr"><<a href="mailto:llandwerlin@gmail.com" target="_blank">llandwerlin@gmail.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left-width:1px;border-left-style:solid;border-left-color:rgb(204,204,204);padding-left:1ex">Fixes the following failures :<br>
<br>
dEQP-VK.api.copy_and_blit.<wbr>resolve_image.whole_4_bit<br>
dEQP-VK.api.copy_and_blit.<wbr>resolve_image.whole_8_bit<br>
dEQP-VK.api.copy_and_blit.<wbr>resolve_image.partial_4_bit<br>
dEQP-VK.api.copy_and_blit.<wbr>resolve_image.partial_8_bit<br>
dEQP-VK.api.copy_and_blit.<wbr>resolve_image.with_regions_4_<wbr>bit<br>
dEQP-VK.api.copy_and_blit.<wbr>resolve_image.with_regions_8_<wbr>bit<br>
<br>
Tested on IVB/HSW<br>
<br>
v2: Check pMultisampleState is not NULL<br>
<br>
v3: Drop rasterization state rename (Anuj)<br>
    Fix value of MultisampleRasterizationMode in 3DSTATE_SF<br>
<br>
v4: rebase on master<br>
<br>
Signed-off-by: Lionel Landwerlin <<a href="mailto:lionel.g.landwerlin@intel.com">lionel.g.landwerlin@intel.com</a><wbr>><br>
Cc: Jason Ekstrand <<a href="mailto:jason@jlekstrand.net">jason@jlekstrand.net</a>><br>
---<br>
 src/intel/vulkan/gen7_<wbr>pipeline.c      | 10 ++++++++--<br>
 src/intel/vulkan/gen8_<wbr>pipeline.c      |  2 +-<br>
 src/intel/vulkan/genX_<wbr>pipeline_util.h |  4 ++++<br>
 3 files changed, 13 insertions(+), 3 deletions(-)<br>
<br>
diff --git a/src/intel/vulkan/gen7_<wbr>pipeline.c b/src/intel/vulkan/gen7_<wbr>pipeline.c<br>
index 1da28c0..135281d 100644<br>
--- a/src/intel/vulkan/gen7_<wbr>pipeline.c<br>
+++ b/src/intel/vulkan/gen7_<wbr>pipeline.c<br>
@@ -68,7 +68,7 @@ genX(graphics_pipeline_create)<wbr>(<br>
<br>
    assert(pCreateInfo-><wbr>pRasterizationState);<br>
    emit_rs_state(pipeline, pCreateInfo-><wbr>pRasterizationState,<br>
-                 pass, subpass, extra);<br>
+                 pCreateInfo-><wbr>pMultisampleState, pass, subpass, extra);<br>
<br>
    emit_ds_state(pipeline, pCreateInfo-><wbr>pDepthStencilState, pass, subpass);<br>
<br>
@@ -85,7 +85,8 @@ genX(graphics_pipeline_create)<wbr>(<br>
        pCreateInfo-><wbr>pMultisampleState-><wbr>rasterizationSamples > 1)<br>
       anv_finishme("VK_STRUCTURE_<wbr>TYPE_PIPELINE_MULTISAMPLE_<wbr>STATE_CREATE_INFO");<br>
<br>
-   uint32_t samples = 1;<br>
+   uint32_t samples = pCreateInfo->pMultisampleState ?<br>
+                      pCreateInfo-><wbr>pMultisampleState-><wbr>rasterizationSamples : 1;<br>
    uint32_t log2_samples = __builtin_ffs(samples) - 1;<br>
<br>
    anv_batch_emit(&pipeline-><wbr>batch, GENX(3DSTATE_MULTISAMPLE), ms) {<br>
@@ -273,6 +274,11 @@ genX(graphics_pipeline_create)<wbr>(<br>
          }<br>
<br>
          wm.<wbr>BarycentricInterpolationMode        = wm_prog_data->barycentric_<wbr>interp_modes;<br>
+<br>
+         wm.<wbr>MultisampleRasterizationMode        = samples > 1 ?<br>
+                                                  MSRASTMODE_ON_PATTERN : MSRASTMODE_OFF_PIXEL;<br>
+         wm.MultisampleDispatchMode             = wm_prog_data->persample_<wbr>dispatch ?<br>
+                                                  MSDISPMODE_PERSAMPLE : MSDISPMODE_PERPIXEL;<br>
       }<br>
    }<br>
<br>
diff --git a/src/intel/vulkan/gen8_<wbr>pipeline.c b/src/intel/vulkan/gen8_<wbr>pipeline.c<br>
index d16ce7b..1840ce2 100644<br>
--- a/src/intel/vulkan/gen8_<wbr>pipeline.c<br>
+++ b/src/intel/vulkan/gen8_<wbr>pipeline.c<br>
@@ -120,7 +120,7 @@ genX(graphics_pipeline_create)<wbr>(<br>
    emit_ia_state(pipeline, pCreateInfo-><wbr>pInputAssemblyState, extra);<br>
    assert(pCreateInfo-><wbr>pRasterizationState);<br>
    emit_rs_state(pipeline, pCreateInfo-><wbr>pRasterizationState,<br>
-                 pass, subpass, extra);<br>
+                 pCreateInfo-><wbr>pMultisampleState, pass, subpass, extra);<br>
    emit_ms_state(pipeline, pCreateInfo-><wbr>pMultisampleState);<br>
    emit_ds_state(pipeline, pCreateInfo-><wbr>pDepthStencilState, pass, subpass);<br>
    emit_cb_state(pipeline, pCreateInfo->pColorBlendState,<br>
diff --git a/src/intel/vulkan/genX_<wbr>pipeline_util.h b/src/intel/vulkan/genX_<wbr>pipeline_util.h<br>
index 0aa85ba..3d0ab9a 100644<br>
--- a/src/intel/vulkan/genX_<wbr>pipeline_util.h<br>
+++ b/src/intel/vulkan/genX_<wbr>pipeline_util.h<br>
@@ -365,6 +365,7 @@ static const uint32_t vk_to_gen_front_face[] = {<br>
 static void<br>
 emit_rs_state(struct anv_pipeline *pipeline,<br>
               const VkPipelineRasterizationStateCr<wbr>eateInfo *rs_info,<br>
+              const VkPipelineMultisampleStateCrea<wbr>teInfo *ms_info,<br>
               const struct anv_render_pass *pass,<br>
               const struct anv_subpass *subpass,<br>
               const struct anv_graphics_pipeline_create_<wbr>info *extra)<br>
@@ -433,6 +434,9 @@ emit_rs_state(struct anv_pipeline *pipeline,<br>
             isl_format_get_depth_format(<wbr>isl_format, false);<br>
       }<br>
    }<br>
+<br>
+   sf.<wbr>MultisampleRasterizationMode = (ms_info && ms_info->rasterizationSamples > 1) ?<br>
+                                     MSRASTMODE_ON_PATTERN : MSRASTMODE_OFF_PIXEL;<br>
 #endif<br>
<br>
 #if GEN_GEN >= 8<br>
<span class=""><font color="#888888">--<br>
2.8.1<br>
<br>
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</font></span></blockquote></div><br></div><div class="gmail_extra"><div class="gmail_default" style="font-family:verdana,sans-serif;font-size:small">​Both patches are:</div><div class="gmail_default" style="font-family:verdana,sans-serif;font-size:small">​Reviewed-by: Anuj Phogat <<a href="mailto:anuj.phogat@gmail.com">anuj.phogat@gmail.com</a>></div><br></div></div>