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<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">Hi, Jason<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">Do you want to add this assert in the patch? I did some test, no issue found, but I don’t see the case that we need override the texture target in brw_emit_surface_state,
i.e. surf.dim_layout != dim_layout<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">How can we create this case? And we may need another patch to solve the issue as it’s a new corner case.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">Thanks,<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">Randy<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">index 3a5c573..d727526 100644<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">@@ -109,6 +109,7 @@ brw_emit_surface_state(struct brw_context *brw,<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"> */<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"> assert(brw->has_surface_tile_offset);<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"> assert(view.levels == 1 && view.array_len == 1);<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">+ assert(tile_x == 0 && tile_y == 0);<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"> offset += intel_miptree_get_tile_offsets(mt, view.base_level,<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"> view.base_array_layer,<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif">From:</span></b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif"> Jason Ekstrand [mailto:jason@jlekstrand.net]
<br>
<b>Sent:</b> Thursday, October 6, 2016 1:58 AM<br>
<b>To:</b> Xu, Randy <randy.xu@intel.com><br>
<b>Cc:</b> Palli, Tapani <tapani.palli@intel.com>; mesa-dev@lists.freedesktop.org<br>
<b>Subject:</b> Re: [Mesa-dev] [PATCH 1/3] i965: solve cubemap negative x/y/z faces buffer offset issue in dEQP.<o:p></o:p></span></p>
<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal" style="margin-bottom:12.0pt">Randy,<o:p></o:p></p>
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<p class="MsoNormal" style="margin-bottom:12.0pt">I hadn't realized that we could get images in from EGL where we have a non-zero tile_x and tile_y offset for layer 0 mip 0. That explains things. In that case, I believe this is the correct patch. That said,
I would like to see an "assert(tile_x == 0 && tile_y == 0)" right before we do the intel_miptree_get_tile_offset() in the case below. I don't think those can ever happen at the same time, but if they do, I want to know.<o:p></o:p></p>
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<p class="MsoNormal">--Jason<o:p></o:p></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal">On Tue, Oct 4, 2016 at 5:13 PM, Xu, Randy <<a href="mailto:randy.xu@intel.com" target="_blank">randy.xu@intel.com</a>> wrote:<o:p></o:p></p>
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<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">Hi, Jason & Tapani</span><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"> </span><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">Thanks for your review, let me introduce the dEQP failure first.</span><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"> </span><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">In dEQP-EGL.functional.image.create.gles2_cubemap_negative_*_texture, 2D textures are generated from
all 6 faces of a Cubemap texture (64x64), and then rendered through glDrawXXX.</span><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">In brw_miptree_get_vertical_slice_pitch, the mt->qpitch is counted as 144.</span><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"> return h0 + h1 + (brw->gen >= 7 ? 12 : 11) * mt->valign; // 64+32+12*4
= 144</span><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"> </span><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">Take the face negative_x for example, the total offset in bo is 144(y)*64(x)*4(bpp) = 36864.</span><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">It’s TILING_Y buffer, as the y (144) is not 32 aligned (mask_y = 31 from intel_region_get_tile_masks),
the total bo offset is divided into two parts: 36864 = 32768 (offset 128*64*4) + 16(tile_y)*64*4</span><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto;margin-left:.5in">
<span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"> case I915_TILING_Y:</span><o:p></o:p></p>
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<span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"> *mask_x = 128 / cpp - 1;</span><o:p></o:p></p>
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<span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"> *mask_y = 31;</span><o:p></o:p></p>
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<span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"> </span><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"> </span><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">Both the tile_y and offset are passed to texture2D in create_mt_for_dri_image, while the tile_y is
not used to count the total offset in rendering path, that’s why I add this patch.</span><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">Please check and comment more.</span><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"> </span><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">Thanks,</span><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">Randy
</span><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"> </span><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"> </span><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"> </span><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"> </span><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif">From:</span></b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif"> Jason Ekstrand [mailto:<a href="mailto:jason@jlekstrand.net" target="_blank">jason@jlekstrand.net</a>]
<br>
<b>Sent:</b> Tuesday, October 4, 2016 11:59 PM<br>
<b>To:</b> Palli, Tapani <<a href="mailto:tapani.palli@intel.com" target="_blank">tapani.palli@intel.com</a>><br>
<b>Cc:</b> Xu, Randy <<a href="mailto:randy.xu@intel.com" target="_blank">randy.xu@intel.com</a>>;
<a href="mailto:mesa-dev@lists.freedesktop.org" target="_blank">mesa-dev@lists.freedesktop.org</a>;
<a href="mailto:Xu@freedesktop.org" target="_blank">Xu@freedesktop.org</a><br>
<b>Subject:</b> Re: [Mesa-dev] [PATCH 1/3] i965: solve cubemap negative x/y/z faces buffer offset issue in dEQP.</span><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"> <o:p></o:p></p>
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<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto">On Tue, Oct 4, 2016 at 8:55 AM, Tapani Pälli <<a href="mailto:tapani.palli@intel.com" target="_blank">tapani.palli@intel.com</a>> wrote:<o:p></o:p></p>
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<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto">On 10/04/2016 06:09 PM, Jason Ekstrand wrote:<o:p></o:p></p>
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<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto">On Thu, Sep 29, 2016 at 11:27 PM, Xu,Randy <<a href="mailto:randy.xu@intel.com" target="_blank">randy.xu@intel.com</a>> wrote:<o:p></o:p></p>
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<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto">Add the miptree level/slice x/y_offset when count the surface offset<br>
in brw_emit_surface_state. The surface offset has two parts, one is<br>
from mt->offset, which should be 32 aligned in width/height for tiled<br>
buffer; another is from mt->level[current_level].slice[current_slice].<br>
x/y_offset.<br>
<br>
This fix will solve 12 deqp failure<br>
dEQP-EGL.functional.image.create.gles2_cubemap_negative_*_texture<br>
<br>
Signed-off-by: Xu,Randy <<a href="mailto:randy.xu@intel.com" target="_blank">randy.xu@intel.com</a>><br>
---<br>
src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 3 ++-<br>
1 file changed, 2 insertions(+), 1 deletion(-)<br>
<br>
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c<br>
index 61a4b94..3a5c573 100644<br>
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c<br>
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c<br>
@@ -85,7 +85,8 @@ brw_emit_surface_state(struct brw_context *brw,<br>
unsigned read_domains, unsigned write_domains)<br>
{<br>
const struct surface_state_info ss_info = surface_state_infos[brw->gen];<br>
- uint32_t tile_x = 0, tile_y = 0;<br>
+ uint32_t tile_x = mt->level[0].slice[0].x_offset;<br>
+ uint32_t tile_y = mt->level[0].slice[0].y_offset;<o:p></o:p></p>
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<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"> <o:p></o:p></p>
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<p class="MsoNormal" style="mso-margin-top-alt:auto;margin-bottom:12.0pt">This isn't correct. First off, there are some fairly strict restrictions on what we can do with tile_x and tile_y and we can't just shove x/y_offset in there. We need to use intel_miptree_get_tile_offsets
to get both a byte offset and an intratile offset. Second, we should already be taking slices into account for cube maps via base_array_layer where needed.<o:p></o:p></p>
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<p class="MsoNormal" style="mso-margin-top-alt:auto;margin-bottom:12.0pt">Unfortunately, I'm not 100% sure what the correct patch is without a bit more information about what the test is doing that causes a problem.<o:p></o:p></p>
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<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"> <o:p></o:p></p>
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<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto">I did take a brief look and when running the set mentioned above (for example with ./deqp-egl --deqp-case=*EGL.functional.image.create.gles2_cubemap_negative_*_texture) what happens
is that we never end up to the part of code calling intel_miptree_get_tile_offsets in that function (because surf.dim_layout != dim_layout condition does not trigger). This is just what I observed, should we just call intel_miptree_get_tile_offsets() unconditionally
then?<o:p></o:p></p>
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<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"> <o:p></o:p></p>
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<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto">No. Very much no. The intel_miptree_get_tile_offsets() stuff is a hack that lets us convert non-2D things to 2D things and it comes with piles of restrictions.<o:p></o:p></p>
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<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"> <o:p></o:p></p>
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<p class="MsoNormal" style="mso-margin-top-alt:auto;margin-bottom:12.0pt"><o:p> </o:p></p>
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<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto">--Jason<o:p></o:p></p>
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<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"> <o:p></o:p></p>
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struct isl_surf surf;<br>
<span style="color:#888888">--<br>
2.7.4<br>
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<a href="https://lists.freedesktop.org/mailman/listinfo/mesa-dev" target="_blank">https://lists.freedesktop.org/mailman/listinfo/mesa-dev</a></span><o:p></o:p></p>
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<pre>_______________________________________________<o:p></o:p></pre>
<pre>mesa-dev mailing list<o:p></o:p></pre>
<pre><a href="mailto:mesa-dev@lists.freedesktop.org" target="_blank">mesa-dev@lists.freedesktop.org</a><o:p></o:p></pre>
<pre><a href="https://lists.freedesktop.org/mailman/listinfo/mesa-dev" target="_blank">https://lists.freedesktop.org/mailman/listinfo/mesa-dev</a><o:p></o:p></pre>
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