<html> <head> <meta content="text/html; charset=utf-8" http-equiv="Content-Type"> </head> <body bgcolor="#FFFFFF" text="#000000"> <div class="moz-cite-prefix">On 24/10/16 18:02, Jason Ekstrand wrote: </div> <blockquote cite="mid:CAOFGe968wKpCYc=p3-N5ZCtC7N2d5zVJQxnaNZ9f9e_9t4zzHg@mail.gmail.com" type="cite"> <meta http-equiv="Content-Type" content="text/html; charset=utf-8"> <div dir="ltr"> <div class="gmail_extra"> <div class="gmail_quote">On Mon, Oct 24, 2016 at 8:22 AM, Jason Ekstrand <<a moz-do-not-send="true" href="mailto:jason@jlekstrand.net" target="_blank">jason@jlekstrand.net</a>> wrote: <blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"> On Oct 24, 2016 2:58 AM, "Lionel Landwerlin" <<a moz-do-not-send="true" href="mailto:lionel.g.landwerlin@intel.com" target="_blank">lionel.g.landwerlin@intel.com</a>> wrote: > > Reviewed-by: Lionel Landwerlin <<a moz-do-not-send="true" href="mailto:lionel.g.landwerlin@intel.com" target="_blank">lionel.g.landwerlin@intel.com</a>> > > Would adding the single register for gen6 makes sense? It's not needed for this series but it wouldn't hurt. I'll add it to the patch. </blockquote> <div> Upon further inspection, that register appears to not exist on gen6. </div> </div> </div> </div> </blockquote> Sorry, got confused by Ken's response. <blockquote cite="mid:CAOFGe968wKpCYc=p3-N5ZCtC7N2d5zVJQxnaNZ9f9e_9t4zzHg@mail.gmail.com" type="cite"> <div dir="ltr"> <div class="gmail_extra"> <div class="gmail_quote"> <blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"> <div class="HOEnZb"> <div class="h5"> > On 22/10/16 18:50, Jason Ekstrand wrote: >> >> --- >> src/intel/genxml/gen7.xml | 16 ++++++++++++++++ >> src/intel/genxml/gen75.xml | 16 ++++++++++++++++ >> src/intel/genxml/gen8.xml | 16 ++++++++++++++++ >> src/intel/genxml/gen9.xml | 16 ++++++++++++++++ >> 4 files changed, 64 insertions(+) >> >> diff --git a/src/intel/genxml/gen7.xml b/src/intel/genxml/gen7.xml >> index a950603..8461bd0 100644 >> --- a/src/intel/genxml/gen7.xml >> +++ b/src/intel/genxml/gen7.xml >> @@ -2555,4 +2555,20 @@ >> <field name="T Low Bandwidth" start="21" end="21" type="uint"/> >> </register> >> + <register name="SO_WRITE_OFFSET0" length="1" num="0x5280"> >> + <field name="Write Offset" start="2" end="31" type="offset"/> >> + </register> >> + >> + <register name="SO_WRITE_OFFSET1" length="1" num="0x5284"> >> + <field name="Write Offset" start="2" end="31" type="offset"/> >> + </register> >> + >> + <register name="SO_WRITE_OFFSET2" length="1" num="0x5288"> >> + <field name="Write Offset" start="2" end="31" type="offset"/> >> + </register> >> + >> + <register name="SO_WRITE_OFFSET3" length="1" num="0x528c"> >> + <field name="Write Offset" start="2" end="31" type="offset"/> >> + </register> >> + >> </genxml> >> diff --git a/src/intel/genxml/gen75.xml b/src/intel/genxml/gen75.xml >> index 2c522d5..168c5cc 100644 >> --- a/src/intel/genxml/gen75.xml >> +++ b/src/intel/genxml/gen75.xml >> @@ -2971,4 +2971,20 @@ >> <field name="L3 Atomic Disable Mask" start="22" end="22" type="uint"/> >> </register> >> + <register name="SO_WRITE_OFFSET0" length="1" num="0x5280"> >> + <field name="Write Offset" start="2" end="31" type="offset"/> >> + </register> >> + >> + <register name="SO_WRITE_OFFSET1" length="1" num="0x5284"> >> + <field name="Write Offset" start="2" end="31" type="offset"/> >> + </register> >> + >> + <register name="SO_WRITE_OFFSET2" length="1" num="0x5288"> >> + <field name="Write Offset" start="2" end="31" type="offset"/> >> + </register> >> + >> + <register name="SO_WRITE_OFFSET3" length="1" num="0x528c"> >> + <field name="Write Offset" start="2" end="31" type="offset"/> >> + </register> >> + >> </genxml> >> diff --git a/src/intel/genxml/gen8.xml b/src/intel/genxml/gen8.xml >> index 73c9265..07672ba 100644 >> --- a/src/intel/genxml/gen8.xml >> +++ b/src/intel/genxml/gen8.xml >> @@ -3175,4 +3175,20 @@ >> <field name="All Allocation" start="25" end="31" type="uint"/> >> </register> >> + <register name="SO_WRITE_OFFSET0" length="1" num="0x5280"> >> + <field name="Write Offset" start="2" end="31" type="offset"/> >> + </register> >> + >> + <register name="SO_WRITE_OFFSET1" length="1" num="0x5284"> >> + <field name="Write Offset" start="2" end="31" type="offset"/> >> + </register> >> + >> + <register name="SO_WRITE_OFFSET2" length="1" num="0x5288"> >> + <field name="Write Offset" start="2" end="31" type="offset"/> >> + </register> >> + >> + <register name="SO_WRITE_OFFSET3" length="1" num="0x528c"> >> + <field name="Write Offset" start="2" end="31" type="offset"/> >> + </register> >> + >> </genxml> >> diff --git a/src/intel/genxml/gen9.xml b/src/intel/genxml/gen9.xml >> index 0dfce3f..3ddf63d 100644 >> --- a/src/intel/genxml/gen9.xml >> +++ b/src/intel/genxml/gen9.xml >> @@ -3449,4 +3449,20 @@ >> <field name="All Allocation" start="25" end="31" type="uint"/> >> </register> >> + <register name="SO_WRITE_OFFSET0" length="1" num="0x5280"> >> + <field name="Write Offset" start="2" end="31" type="offset"/> >> + </register> >> + >> + <register name="SO_WRITE_OFFSET1" length="1" num="0x5284"> >> + <field name="Write Offset" start="2" end="31" type="offset"/> >> + </register> >> + >> + <register name="SO_WRITE_OFFSET2" length="1" num="0x5288"> >> + <field name="Write Offset" start="2" end="31" type="offset"/> >> + </register> >> + >> + <register name="SO_WRITE_OFFSET3" length="1" num="0x528c"> >> + <field name="Write Offset" start="2" end="31" type="offset"/> >> + </register> >> + >> </genxml> > > > </div> </div> </blockquote> </div> </div> </div> </blockquote> </body> </html>