<div dir="ltr"><div class="gmail_extra"><div class="gmail_quote">On Tue, Oct 11, 2016 at 12:26 PM, Topi Pohjolainen <span dir="ltr"><<a href="mailto:topi.pohjolainen@gmail.com" target="_blank">topi.pohjolainen@gmail.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Signed-off-by: Topi Pohjolainen <<a href="mailto:topi.pohjolainen@intel.com">topi.pohjolainen@intel.com</a>><br>
---<br>
src/mesa/drivers/dri/i965/brw_<wbr>blorp.c | 14 ++++++++------<br>
src/mesa/drivers/dri/i965/brw_<wbr>blorp.h | 3 ++-<br>
src/mesa/drivers/dri/i965/brw_<wbr>context.c | 16 +++++++++++-----<br>
src/mesa/drivers/dri/i965/<wbr>intel_blit.c | 8 ++++++--<br>
src/mesa/drivers/dri/i965/<wbr>intel_mipmap_tree.c | 27 +++++++++++++++++++++++++--<br>
src/mesa/drivers/dri/i965/<wbr>intel_mipmap_tree.h | 1 +<br>
6 files changed, 53 insertions(+), 16 deletions(-)<br>
<br>
diff --git a/src/mesa/drivers/dri/i965/<wbr>brw_blorp.c b/src/mesa/drivers/dri/i965/<wbr>brw_blorp.c<br>
index 4030038..c55bbc8 100644<br>
--- a/src/mesa/drivers/dri/i965/<wbr>brw_blorp.c<br>
+++ b/src/mesa/drivers/dri/i965/<wbr>brw_blorp.c<br>
@@ -324,7 +324,8 @@ brw_blorp_blit_miptrees(struct brw_context *brw,<br>
* to destination color buffers, and the standard render path is<br>
* fast-color-aware.<br>
*/<br>
- intel_miptree_resolve_color(<wbr>brw, src_mt, INTEL_MIPTREE_IGNORE_CCS_E);<br>
+ intel_miptree_resolve_color(<wbr>brw, src_mt, src_level, src_logical_layer,<br>
+ INTEL_MIPTREE_IGNORE_CCS_E);<br>
intel_miptree_slice_resolve_<wbr>depth(brw, src_mt, src_level, src_layer);<br>
intel_miptree_slice_resolve_<wbr>depth(brw, dst_mt, dst_level, dst_layer);<br>
<br>
@@ -409,7 +410,8 @@ brw_blorp_copy_miptrees(struct brw_context *brw,<br>
* to destination color buffers, and the standard render path is<br>
* fast-color-aware.<br>
*/<br>
- intel_miptree_resolve_color(<wbr>brw, src_mt, INTEL_MIPTREE_IGNORE_CCS_E);<br>
+ intel_miptree_resolve_color(<wbr>brw, src_mt, src_level, src_layer,<br>
+ INTEL_MIPTREE_IGNORE_CCS_E);<br>
intel_miptree_slice_resolve_<wbr>depth(brw, src_mt, src_level, src_layer);<br>
intel_miptree_slice_resolve_<wbr>depth(brw, dst_mt, dst_level, dst_layer);<br>
<br>
@@ -918,22 +920,22 @@ brw_blorp_clear_color(struct brw_context *brw, struct gl_framebuffer *fb,<br>
}<br>
<br>
void<br>
-brw_blorp_resolve_color(<wbr>struct brw_context *brw, struct intel_mipmap_tree *mt)<br>
+brw_blorp_resolve_color(<wbr>struct brw_context *brw, struct intel_mipmap_tree *mt,<br>
+ unsigned level, unsigned layer)<br>
{<br>
DBG("%s to mt %p\n", __FUNCTION__, mt);<br>
<br>
const mesa_format format = _mesa_get_srgb_format_linear(<wbr>mt->format);<br>
<br>
- intel_miptree_check_level_<wbr>layer(mt, 0 /* level */, 0 /* layer */);<br>
+ intel_miptree_check_level_<wbr>layer(mt, level, layer);<br>
<br>
struct isl_surf isl_tmp[2];<br>
struct blorp_surf surf;<br>
- unsigned level = 0;<br>
blorp_surf_for_miptree(brw, &surf, mt, true, &level, isl_tmp);<br>
<br>
struct blorp_batch batch;<br>
blorp_batch_init(&brw->blorp, &batch, brw);<br>
- blorp_ccs_resolve(&batch, &surf, 0 /* level */, 0 /* layer */,<br>
+ blorp_ccs_resolve(&batch, &surf, level, layer,<br>
brw_blorp_to_isl_format(brw, format, true));<br>
blorp_batch_finish(&batch);<br>
<br>
diff --git a/src/mesa/drivers/dri/i965/<wbr>brw_blorp.h b/src/mesa/drivers/dri/i965/<wbr>brw_blorp.h<br>
index abf3956..ca0a5dd 100644<br>
--- a/src/mesa/drivers/dri/i965/<wbr>brw_blorp.h<br>
+++ b/src/mesa/drivers/dri/i965/<wbr>brw_blorp.h<br>
@@ -64,7 +64,8 @@ brw_blorp_clear_color(struct brw_context *brw, struct gl_framebuffer *fb,<br>
<br>
void<br>
brw_blorp_resolve_color(struct brw_context *brw,<br>
- struct intel_mipmap_tree *mt);<br>
+ struct intel_mipmap_tree *mt,<br>
+ unsigned level, unsigned layer);<br></blockquote><div><br></div><div>There's a tab hiding out in here.<br></div><div> </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
<br>
void<br>
intel_hiz_exec(struct brw_context *brw, struct intel_mipmap_tree *mt,<br>
diff --git a/src/mesa/drivers/dri/i965/<wbr>brw_context.c b/src/mesa/drivers/dri/i965/<wbr>brw_context.c<br>
index 424469c..e1dec45 100644<br>
--- a/src/mesa/drivers/dri/i965/<wbr>brw_context.c<br>
+++ b/src/mesa/drivers/dri/i965/<wbr>brw_context.c<br>
@@ -313,8 +313,11 @@ intel_update_state(struct gl_context * ctx, GLuint new_state)<br>
intel_renderbuffer(fb->_<wbr>ColorDrawBuffers[i]);<br>
<br>
if (irb &&<br>
- intel_miptree_resolve_color(<wbr>brw, irb->mt,<br>
- INTEL_MIPTREE_IGNORE_CCS_E))<br>
+ intel_miptree_resolve_color(<br>
+ brw, irb->mt, irb->mt_level,<br>
+ intel_miptree_physical_to_<wbr>logical_layer(<br>
+ irb->mt, irb->mt_layer),<br>
+ INTEL_MIPTREE_IGNORE_CCS_E))<br>
brw_render_cache_set_check_<wbr>flush(brw, irb->mt->bo);<br>
}<br>
}<br>
@@ -1344,10 +1347,13 @@ intel_resolve_for_dri2_flush(<wbr>struct brw_context *brw,<br>
rb = intel_get_renderbuffer(fb, buffers[i]);<br>
if (rb == NULL || rb->mt == NULL)<br>
continue;<br>
- if (rb->mt->num_samples <= 1)<br>
- intel_miptree_resolve_color(<wbr>brw, rb->mt, 0);<br>
- else<br>
+ if (rb->mt->num_samples <= 1) {<br>
+ assert(rb->mt_layer == 0 && rb->mt_level == 0 &&<br>
+ rb->layer_count == 1);<br>
+ intel_miptree_resolve_color(<wbr>brw, rb->mt, 0, 0, 0);<br>
+ } else {<br>
intel_renderbuffer_downsample(<wbr>brw, rb);<br>
+ }<br>
}<br>
}<br>
<br>
diff --git a/src/mesa/drivers/dri/i965/<wbr>intel_blit.c b/src/mesa/drivers/dri/i965/<wbr>intel_blit.c<br>
index b7a9cc9..8da863a 100644<br>
--- a/src/mesa/drivers/dri/i965/<wbr>intel_blit.c<br>
+++ b/src/mesa/drivers/dri/i965/<wbr>intel_blit.c<br>
@@ -258,8 +258,12 @@ intel_miptree_blit(struct brw_context *brw,<br>
*/<br>
intel_miptree_slice_resolve_<wbr>depth(brw, src_mt, src_level, src_slice);<br>
intel_miptree_slice_resolve_<wbr>depth(brw, dst_mt, dst_level, dst_slice);<br>
- intel_miptree_resolve_color(<wbr>brw, src_mt, 0);<br>
- intel_miptree_resolve_color(<wbr>brw, dst_mt, 0);<br>
+ intel_miptree_resolve_color(<br>
+ brw, src_mt, src_level,<br>
+ intel_miptree_physical_to_<wbr>logical_layer(src_mt, src_slice), 0);<br>
+ intel_miptree_resolve_color(<br>
+ brw, dst_mt, dst_level,<br>
+ intel_miptree_physical_to_<wbr>logical_layer(dst_mt, dst_slice), 0);<br>
<br>
if (src_flip)<br>
src_y = minify(src_mt->physical_<wbr>height0, src_level - src_mt->first_level) - src_y - height;<br>
diff --git a/src/mesa/drivers/dri/i965/<wbr>intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/<wbr>intel_mipmap_tree.c<br>
index 9287d79..ce72e2c 100644<br>
--- a/src/mesa/drivers/dri/i965/<wbr>intel_mipmap_tree.c<br>
+++ b/src/mesa/drivers/dri/i965/<wbr>intel_mipmap_tree.c<br>
@@ -2099,12 +2099,35 @@ intel_miptree_all_slices_<wbr>resolve_depth(struct brw_context *brw,<br>
BLORP_HIZ_OP_DEPTH_RESOLVE);<br>
}<br>
<br>
+static void<br>
+intel_miptree_check_color_<wbr>resolve(const struct intel_mipmap_tree *mt,<br>
+ unsigned level, unsigned layer)<br>
+{<br>
+ if (!mt->mcs_mt)<br>
+ return;<br>
+<br>
+ /* Fast color clear is not supported for mipmapped surfaces. */<br>
+ assert(level == 0 && mt->first_level == 0 && mt->last_level == 0);<br>
+<br>
+ /* Compression of arrayed msaa surfaces is supported. */<br>
+ if (mt->num_samples > 1)<br>
+ return;<br>
+<br>
+ /* Fast color clear is not supported for non-msaa arrays. */<br>
+ assert(layer == 0 && mt->logical_depth0 == 1);<br>
+<br>
+ (void)level;<br>
+ (void)layer;<br>
+}<br>
<br>
bool<br>
intel_miptree_resolve_color(<wbr>struct brw_context *brw,<br>
struct intel_mipmap_tree *mt,<br>
+ unsigned level, unsigned layer,<br>
int flags)<br>
{<br>
+ intel_miptree_check_color_<wbr>resolve(mt, level, layer);<br>
+<br>
/* From gen9 onwards there is new compression scheme for single sampled<br>
* surfaces called "lossless compressed". These don't need to be always<br>
* resolved.<br>
@@ -2123,7 +2146,7 @@ intel_miptree_resolve_color(<wbr>struct brw_context *brw,<br>
/* Fast color clear resolves only make sense for non-MSAA buffers. */<br>
if (mt->msaa_layout == INTEL_MSAA_LAYOUT_NONE ||<br>
intel_miptree_is_lossless_<wbr>compressed(brw, mt)) {<br>
- brw_blorp_resolve_color(brw, mt);<br>
+ brw_blorp_resolve_color(brw, mt, level, layer);<br>
return true;<br>
} else {<br>
return false;<br>
@@ -2138,7 +2161,7 @@ intel_miptree_all_slices_<wbr>resolve_color(struct brw_context *brw,<br>
struct intel_mipmap_tree *mt,<br>
int flags)<br>
{<br>
- intel_miptree_resolve_color(<wbr>brw, mt, flags);<br>
+ intel_miptree_resolve_color(<wbr>brw, mt, 0, 0, flags);<br>
}<br>
<br>
/**<br>
diff --git a/src/mesa/drivers/dri/i965/<wbr>intel_mipmap_tree.h b/src/mesa/drivers/dri/i965/<wbr>intel_mipmap_tree.h<br>
index 69f7c5d..bfb8ad5 100644<br>
--- a/src/mesa/drivers/dri/i965/<wbr>intel_mipmap_tree.h<br>
+++ b/src/mesa/drivers/dri/i965/<wbr>intel_mipmap_tree.h<br>
@@ -976,6 +976,7 @@ intel_miptree_used_for_<wbr>rendering(const struct brw_context *brw,<br>
bool<br>
intel_miptree_resolve_color(<wbr>struct brw_context *brw,<br>
struct intel_mipmap_tree *mt,<br>
+ unsigned level, unsigned layer,<br>
int flags);<br>
<br>
void<br>
<span class="HOEnZb"><font color="#888888">--<br>
2.5.5<br>
<br>
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</font></span></blockquote></div><br></div></div>