<div dir="ltr"><div>Patches 11-17 are<br><br></div>Reviewed-by: Jason Ekstrand <<a href="mailto:jason@jlekstrand.net">jason@jlekstrand.net</a>><br></div><div class="gmail_extra"><br><div class="gmail_quote">On Tue, Oct 11, 2016 at 12:26 PM, Topi Pohjolainen <span dir="ltr"><<a href="mailto:topi.pohjolainen@gmail.com" target="_blank">topi.pohjolainen@gmail.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Signed-off-by: Topi Pohjolainen <<a href="mailto:topi.pohjolainen@intel.com">topi.pohjolainen@intel.com</a>><br>
---<br>
src/mesa/drivers/dri/i965/<wbr>intel_mipmap_tree.c | 63 +++++++++++++++++++--------<br>
src/mesa/drivers/dri/i965/<wbr>intel_mipmap_tree.h | 14 +++---<br>
2 files changed, 52 insertions(+), 25 deletions(-)<br>
<br>
diff --git a/src/mesa/drivers/dri/i965/<wbr>intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/<wbr>intel_mipmap_tree.c<br>
index f9ceb3b..f3d4cbe 100644<br>
--- a/src/mesa/drivers/dri/i965/<wbr>intel_mipmap_tree.c<br>
+++ b/src/mesa/drivers/dri/i965/<wbr>intel_mipmap_tree.c<br>
@@ -374,11 +374,11 @@ intel_miptree_create_layout(<wbr>struct brw_context *brw,<br>
mt->logical_width0 = width0;<br>
mt->logical_height0 = height0;<br>
mt->logical_depth0 = depth0;<br>
- mt->fast_clear_state = INTEL_FAST_CLEAR_STATE_<wbr>RESOLVED;<br>
mt->disable_aux_buffers = (layout_flags & MIPTREE_LAYOUT_DISABLE_AUX) != 0;<br>
mt->no_msrt_mcs = true;<br>
mt->is_scanout = (layout_flags & MIPTREE_LAYOUT_FOR_SCANOUT) != 0;<br>
exec_list_make_empty(&mt->hiz_<wbr>map);<br>
+ exec_list_make_empty(&mt-><wbr>color_resolve_map);<br>
mt->cpp = _mesa_get_format_bytes(format)<wbr>;<br>
mt->num_samples = num_samples;<br>
mt->compressed = _mesa_is_format_compressed(<wbr>format);<br>
@@ -910,7 +910,7 @@ intel_update_winsys_<wbr>renderbuffer_miptree(struct brw_context *intel,<br>
*/<br>
if (intel_tiling_supports_non_<wbr>msrt_mcs(intel, singlesample_mt->tiling) &&<br>
intel_miptree_supports_non_<wbr>msrt_fast_clear(intel, singlesample_mt)) {<br>
- singlesample_mt->fast_clear_<wbr>state = INTEL_FAST_CLEAR_STATE_<wbr>RESOLVED;<br>
+ singlesample_mt->no_msrt_mcs = false;<br>
}<br>
<br>
if (num_samples == 0) {<br>
@@ -1570,7 +1570,12 @@ intel_miptree_alloc_mcs(struct brw_context *brw,<br>
mcs_flags);<br>
<br>
intel_miptree_init_mcs(brw, mt, 0xFF);<br>
- mt->fast_clear_state = INTEL_FAST_CLEAR_STATE_CLEAR;<br>
+<br>
+ /* Multisampled miptrees are only supported for single level. */<br>
+ assert(mt->first_level == 0);<br>
+ intel_miptree_set_fast_clear_<wbr>state(mt, mt->first_level, 0,<br>
+ mt->logical_depth0,<br>
+ INTEL_FAST_CLEAR_STATE_CLEAR);<br>
<br>
return mt->mcs_mt;<br>
}<br>
@@ -1656,7 +1661,6 @@ intel_miptree_alloc_non_msrt_<wbr>mcs(struct brw_context *brw,<br>
* Software needs to initialize MCS with zeros."<br>
*/<br>
intel_miptree_init_mcs(brw, mt, 0);<br>
- mt->fast_clear_state = INTEL_FAST_CLEAR_STATE_<wbr>RESOLVED;<br>
mt->msaa_layout = INTEL_MSAA_LAYOUT_CMS;<br>
}<br>
<br>
@@ -2105,7 +2109,15 @@ enum intel_fast_clear_state<br>
intel_miptree_get_fast_clear_<wbr>state(const struct intel_mipmap_tree *mt,<br>
unsigned level, unsigned layer)<br>
{<br>
- return mt->fast_clear_state;<br>
+ intel_miptree_check_level_<wbr>layer(mt, level, layer);<br>
+<br>
+ const struct intel_resolve_map *item =<br>
+ intel_resolve_map_const_get(&<wbr>mt->color_resolve_map, level, layer);<br>
+<br>
+ if (!item)<br>
+ return INTEL_FAST_CLEAR_STATE_<wbr>RESOLVED;<br>
+<br>
+ return item->fast_clear_state;<br>
}<br>
<br>
static void<br>
@@ -2140,7 +2152,9 @@ intel_miptree_set_fast_clear_<wbr>state(struct intel_mipmap_tree *mt,<br>
<br>
assert(first_layer + num_layers <= mt->physical_depth0);<br>
<br>
- mt->fast_clear_state = new_state;<br>
+ while (num_layers--)<br>
+ intel_resolve_map_set(&mt-><wbr>color_resolve_map, level,<br>
+ first_layer++, new_state);<br>
}<br>
<br>
bool<br>
@@ -2148,7 +2162,9 @@ intel_miptree_has_color_<wbr>unresolved(const struct intel_mipmap_tree *mt,<br>
unsigned start_level, unsigned num_levels,<br>
unsigned start_layer, unsigned num_layers)<br>
{<br>
- return mt->fast_clear_state != INTEL_FAST_CLEAR_STATE_<wbr>RESOLVED;<br>
+ return intel_resolve_map_find_any(&<wbr>mt->color_resolve_map,<br>
+ start_level, num_levels,<br>
+ start_layer, num_layers) != NULL;<br>
}<br>
<br>
void<br>
@@ -2212,17 +2228,18 @@ intel_miptree_resolve_color(<wbr>struct brw_context *brw,<br>
if (!intel_miptree_needs_color_<wbr>resolve(brw, mt, flags))<br>
return false;<br>
<br>
- switch (mt->fast_clear_state) {<br>
- case INTEL_FAST_CLEAR_STATE_<wbr>RESOLVED:<br>
- /* No resolve needed */<br>
+ intel_miptree_check_level_<wbr>layer(mt, level, layer);<br>
+<br>
+ struct intel_resolve_map *item =<br>
+ intel_resolve_map_get(&mt-><wbr>color_resolve_map, level, layer);<br>
+<br>
+ if (!item || item->fast_clear_state == INTEL_FAST_CLEAR_STATE_<wbr>RESOLVED)<br>
return false;<br>
- case INTEL_FAST_CLEAR_STATE_<wbr>UNRESOLVED:<br>
- case INTEL_FAST_CLEAR_STATE_CLEAR:<br>
- brw_blorp_resolve_color(brw, mt, level, layer);<br>
- return true;<br>
- default:<br>
- unreachable("Invalid fast clear state");<br>
- }<br>
+<br>
+ brw_blorp_resolve_color(brw, mt, level, layer);<br>
+ intel_resolve_map_remove(item)<wbr>;<br>
+<br>
+ return true;<br>
}<br>
<br>
void<br>
@@ -2230,7 +2247,17 @@ intel_miptree_all_slices_<wbr>resolve_color(struct brw_context *brw,<br>
struct intel_mipmap_tree *mt,<br>
int flags)<br>
{<br>
- intel_miptree_resolve_color(<wbr>brw, mt, 0, 0, flags);<br>
+ if (!intel_miptree_needs_color_<wbr>resolve(brw, mt, flags))<br>
+ return;<br>
+<br>
+ foreach_list_typed_safe(struct intel_resolve_map, map, link,<br>
+ &mt->color_resolve_map) {<br>
+ if (map->fast_clear_state == INTEL_FAST_CLEAR_STATE_<wbr>RESOLVED)<br>
+ continue;<br>
+<br>
+ brw_blorp_resolve_color(brw, mt, map->level, map->layer);<br>
+ intel_resolve_map_remove(map);<br>
+ }<br>
}<br>
<br>
/**<br>
diff --git a/src/mesa/drivers/dri/i965/<wbr>intel_mipmap_tree.h b/src/mesa/drivers/dri/i965/<wbr>intel_mipmap_tree.h<br>
index 8c53fa0..db3ccb0 100644<br>
--- a/src/mesa/drivers/dri/i965/<wbr>intel_mipmap_tree.h<br>
+++ b/src/mesa/drivers/dri/i965/<wbr>intel_mipmap_tree.h<br>
@@ -527,15 +527,20 @@ struct intel_mipmap_tree<br>
struct intel_miptree_aux_buffer *hiz_buf;<br>
<br>
/**<br>
- * \brief Map of miptree slices to needed resolves.<br>
+ * \brief Maps of miptree slices to needed resolves.<br>
*<br>
- * This is used only when the miptree has a child HiZ miptree.<br>
+ * hiz_map is used only when the miptree has a child HiZ miptree.<br>
*<br>
* Let \c mt be a depth miptree with HiZ enabled. Then the resolve map is<br>
* \c mt->hiz_map. The resolve map of the child HiZ miptree, \c<br>
* mt->hiz_mt->hiz_map, is unused.<br>
+ *<br>
+ *<br>
+ * color_resolve_map is used only when the miptree uses fast clear (Gen7+)<br>
+ * lossless compression (Gen9+).<br>
*/<br>
struct exec_list hiz_map; /* List of intel_resolve_map. */<br>
+ struct exec_list color_resolve_map; /* List of intel_resolve_map. */<br>
<br>
/**<br>
* \brief Stencil miptree for depthstencil textures.<br>
@@ -579,11 +584,6 @@ struct intel_mipmap_tree<br>
struct intel_mipmap_tree *plane[2];<br>
<br>
/**<br>
- * Fast clear state for this buffer.<br>
- */<br>
- enum intel_fast_clear_state fast_clear_state;<br>
-<br>
- /**<br>
* The SURFACE_STATE bits associated with the last fast color clear to this<br>
* color mipmap tree, if any.<br>
*<br>
<span class="HOEnZb"><font color="#888888">--<br>
2.5.5<br>
<br>
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