<div dir="ltr"><div class="gmail_extra"><div class="gmail_quote">On Tue, Oct 11, 2016 at 12:26 PM, Topi Pohjolainen <span dir="ltr"><<a href="mailto:topi.pohjolainen@gmail.com" target="_blank">topi.pohjolainen@gmail.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Signed-off-by: Topi Pohjolainen <<a href="mailto:topi.pohjolainen@intel.com">topi.pohjolainen@intel.com</a>><br>
---<br>
src/intel/isl/isl.c | 3 +--<br>
src/mesa/drivers/dri/i965/brw_<wbr>blorp.c | 6 +++---<br>
src/mesa/drivers/dri/i965/<wbr>intel_mipmap_tree.c | 23 +++++++++++++----------<br>
src/mesa/drivers/dri/i965/<wbr>intel_mipmap_tree.h | 3 ++-<br>
4 files changed, 19 insertions(+), 16 deletions(-)<br>
<br>
diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c<br>
index 66e2df3..7e1e720 100644<br>
--- a/src/intel/isl/isl.c<br>
+++ b/src/intel/isl/isl.c<br>
@@ -1430,8 +1430,7 @@ isl_surf_get_ccs_surf(const struct isl_device *dev,<br>
assert(ISL_DEV_GEN(dev) >= 7);<br>
<br>
assert(ISL_DEV_GEN(dev) >= 8 || surf->dim == ISL_SURF_DIM_2D);<br>
-<br>
- assert(surf->logical_level0_<wbr>px.depth == 1);<br>
+ assert(ISL_DEV_GEN(dev) >= 8 || surf->logical_level0_px.depth == 1);<br></blockquote><div><br></div><div>I have a patch in my series which fixes this and another assert or two.<br></div><div> </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
<br>
/* TODO: More conditions where it can fail. */<br>
<br>
diff --git a/src/mesa/drivers/dri/i965/<wbr>brw_blorp.c b/src/mesa/drivers/dri/i965/<wbr>brw_blorp.c<br>
index 4e3359c..ee81ffc 100644<br>
--- a/src/mesa/drivers/dri/i965/<wbr>brw_blorp.c<br>
+++ b/src/mesa/drivers/dri/i965/<wbr>brw_blorp.c<br>
@@ -773,7 +773,7 @@ set_slice_fast_clear_color(<wbr>struct brw_context *brw,<br>
{<br>
bool updated = false;<br>
<br>
- assert(first_layer == 0 && num_layers == 1);<br>
+ assert(brw->gen >= 8 || (first_layer == 0 && num_layers == 1));<br>
<br>
for (unsigned i = 0; i < num_layers; ++i) {<br>
updated |= brw_meta_set_fast_clear_color(<br>
@@ -912,7 +912,7 @@ do_single_blorp_clear(struct brw_context *brw, struct gl_framebuffer *fb,<br>
* INTEL_FAST_CLEAR_STATE_CLEAR so that we won't waste time doing<br>
* redundant clears.<br>
*/<br>
- intel_miptree_set_fast_clear_<wbr>state(irb->mt, irb->mt_level,<br>
+ intel_miptree_set_fast_clear_<wbr>state(brw, irb->mt, irb->mt_level,<br>
layer, num_layers,<br>
INTEL_FAST_CLEAR_STATE_CLEAR);<br>
} else {<br>
@@ -993,7 +993,7 @@ brw_blorp_resolve_color(struct brw_context *brw, struct intel_mipmap_tree *mt,<br>
brw_blorp_to_isl_format(brw, format, true));<br>
blorp_batch_finish(&batch);<br>
<br>
- intel_miptree_set_fast_clear_<wbr>state(mt, level, layer, 1,<br>
+ intel_miptree_set_fast_clear_<wbr>state(brw, mt, level, layer, 1,<br>
INTEL_FAST_CLEAR_STATE_<wbr>RESOLVED);<br>
}<br>
<br>
diff --git a/src/mesa/drivers/dri/i965/<wbr>intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/<wbr>intel_mipmap_tree.c<br>
index a41a654..932220e 100644<br>
--- a/src/mesa/drivers/dri/i965/<wbr>intel_mipmap_tree.c<br>
+++ b/src/mesa/drivers/dri/i965/<wbr>intel_mipmap_tree.c<br>
@@ -1590,7 +1590,7 @@ intel_miptree_alloc_mcs(struct brw_context *brw,<br>
<br>
/* Multisampled miptrees are only supported for single level. */<br>
assert(mt->first_level == 0);<br>
- intel_miptree_set_fast_clear_<wbr>state(mt, mt->first_level, 0,<br>
+ intel_miptree_set_fast_clear_<wbr>state(brw, mt, mt->first_level, 0,<br>
mt->logical_depth0,<br>
INTEL_FAST_CLEAR_STATE_CLEAR);<br>
<br>
@@ -2167,34 +2167,37 @@ intel_miptree_get_fast_clear_<wbr>state(const struct intel_mipmap_tree *mt,<br>
}<br>
<br>
static void<br>
-intel_miptree_check_color_<wbr>resolve(const struct intel_mipmap_tree *mt,<br>
+intel_miptree_check_color_<wbr>resolve(const struct brw_context *brw,<br>
+ const struct intel_mipmap_tree *mt,<br>
unsigned level, unsigned layer)<br>
{<br>
if (!mt->mcs_mt)<br>
return;<br>
<br>
- /* Fast color clear is not supported for mipmapped surfaces. */<br>
- assert(level == 0 && mt->first_level == 0 && mt->last_level == 0);<br>
+ /* Fast color clear is supported for mipmapped surfaces only on Gen8+. */<br>
+ assert(brw->gen >= 8 ||<br>
+ (level == 0 && mt->first_level == 0 && mt->last_level == 0));<br>
<br>
/* Compression of arrayed msaa surfaces is supported. */<br>
if (mt->num_samples > 1)<br>
return;<br>
<br>
- /* Fast color clear is not supported for non-msaa arrays. */<br>
- assert(layer == 0 && mt->logical_depth0 == 1);<br>
+ /* Fast color clear is supported for non-msaa arrays only on Gen8+. */<br>
+ assert(brw->gen >= 8 || (layer == 0 && mt->logical_depth0 == 1));<br>
<br>
(void)level;<br>
(void)layer;<br>
}<br>
<br>
void<br>
-intel_miptree_set_fast_clear_<wbr>state(struct intel_mipmap_tree *mt,<br>
+intel_miptree_set_fast_clear_<wbr>state(const struct brw_context *brw,<br>
+ struct intel_mipmap_tree *mt,<br>
unsigned level,<br>
unsigned first_layer,<br>
unsigned num_layers,<br>
enum intel_fast_clear_state new_state)<br>
{<br>
- intel_miptree_check_color_<wbr>resolve(mt, level, first_layer);<br>
+ intel_miptree_check_color_<wbr>resolve(brw, mt, level, first_layer);<br>
<br>
assert(first_layer + num_layers <= mt->physical_depth0);<br>
<br>
@@ -2232,7 +2235,7 @@ intel_miptree_used_for_<wbr>rendering(const struct brw_context *brw,<br>
if (is_lossless_compressed ||<br>
fast_clear_state == INTEL_FAST_CLEAR_STATE_CLEAR) {<br>
intel_miptree_set_fast_clear_<wbr>state(<br>
- mt, level, start_layer + i, 1,<br>
+ brw, mt, level, start_layer + i, 1,<br>
INTEL_FAST_CLEAR_STATE_<wbr>UNRESOLVED);<br>
}<br>
}<br>
@@ -2269,7 +2272,7 @@ intel_miptree_resolve_color(<wbr>struct brw_context *brw,<br>
unsigned level, unsigned layer,<br>
int flags)<br>
{<br>
- intel_miptree_check_color_<wbr>resolve(mt, level, layer);<br>
+ intel_miptree_check_color_<wbr>resolve(brw, mt, level, layer);<br>
<br>
if (!intel_miptree_needs_color_<wbr>resolve(brw, mt, flags))<br>
return false;<br>
diff --git a/src/mesa/drivers/dri/i965/<wbr>intel_mipmap_tree.h b/src/mesa/drivers/dri/i965/<wbr>intel_mipmap_tree.h<br>
index 1ba2fb9..e98a935 100644<br>
--- a/src/mesa/drivers/dri/i965/<wbr>intel_mipmap_tree.h<br>
+++ b/src/mesa/drivers/dri/i965/<wbr>intel_mipmap_tree.h<br>
@@ -897,7 +897,8 @@ intel_miptree_get_fast_clear_<wbr>state(const struct intel_mipmap_tree *mt,<br>
unsigned level, unsigned layer);<br>
<br>
void<br>
-intel_miptree_set_fast_clear_<wbr>state(struct intel_mipmap_tree *mt,<br>
+intel_miptree_set_fast_clear_<wbr>state(const struct brw_context *brw,<br>
+ struct intel_mipmap_tree *mt,<br>
unsigned level,<br>
unsigned first_layer,<br>
unsigned num_layers,<br>
<span class="HOEnZb"><font color="#888888">--<br>
2.5.5<br>
<br>
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</font></span></blockquote></div><br></div></div>