<div dir="ltr"><div>Reviewed-by: Jason Ekstrand <<a href="mailto:jason@jlekstrand.net">jason@jlekstrand.net</a>><br><br></div>Of course, the other has to land first. :-)<br></div><div class="gmail_extra"><br><div class="gmail_quote">On Tue, Nov 22, 2016 at 1:55 PM, Plamena Manolova <span dir="ltr"><<a href="mailto:plamena.manolova@intel.com" target="_blank">plamena.manolova@intel.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><span class="">This extension allows the fragment shader to control whether values in<br>
gl_SampleMaskIn[] reflect the coverage after application of the early<br>
depth and stencil tests.<br>
<br>
Signed-off-by: Plamena Manolova <<a href="mailto:plamena.manolova@intel.com">plamena.manolova@intel.com</a>><br>
---<br>
src/mesa/drivers/dri/i965/brw_<wbr>compiler.h | 1 +<br>
src/mesa/drivers/dri/i965/brw_<wbr>fs.cpp | 1 +<br>
src/mesa/drivers/dri/i965/<wbr>gen8_ps_state.c | 13 ++++++++++---<br>
src/mesa/drivers/dri/i965/<wbr>intel_extensions.c | 1 +<br>
4 files changed, 13 insertions(+), 3 deletions(-)<br>
<br>
diff --git a/src/mesa/drivers/dri/i965/<wbr>brw_compiler.h b/src/mesa/drivers/dri/i965/<wbr>brw_compiler.h<br>
</span>index 65a7478..410641f 100644<br>
<div><div class="h5">--- a/src/mesa/drivers/dri/i965/<wbr>brw_compiler.h<br>
+++ b/src/mesa/drivers/dri/i965/<wbr>brw_compiler.h<br>
@@ -397,6 +397,7 @@ struct brw_wm_prog_data {<br>
bool computed_stencil;<br>
<br>
bool early_fragment_tests;<br>
+ bool post_depth_coverage;<br>
bool dispatch_8;<br>
bool dispatch_16;<br>
bool dual_src_blend;<br>
diff --git a/src/mesa/drivers/dri/i965/<wbr>brw_fs.cpp b/src/mesa/drivers/dri/i965/<wbr>brw_fs.cpp<br>
index 3cdf0bf..07ac4bc 100644<br>
--- a/src/mesa/drivers/dri/i965/<wbr>brw_fs.cpp<br>
+++ b/src/mesa/drivers/dri/i965/<wbr>brw_fs.cpp<br>
@@ -6455,6 +6455,7 @@ brw_compile_fs(const struct brw_compiler *compiler, void *log_data,<br>
shader->info->outputs_read);<br>
<br>
prog_data->early_fragment_<wbr>tests = shader->info->fs.early_<wbr>fragment_tests;<br>
+ prog_data->post_depth_coverage = shader->info->fs.post_depth_<wbr>coverage;<br>
<br>
prog_data->barycentric_interp_<wbr>modes =<br>
brw_compute_barycentric_<wbr>interp_modes(compiler-><wbr>devinfo, shader);<br>
diff --git a/src/mesa/drivers/dri/i965/<wbr>gen8_ps_state.c b/src/mesa/drivers/dri/i965/<wbr>gen8_ps_state.c<br>
index a4eb962..33ef023 100644<br>
--- a/src/mesa/drivers/dri/i965/<wbr>gen8_ps_state.c<br>
+++ b/src/mesa/drivers/dri/i965/<wbr>gen8_ps_state.c<br>
@@ -53,10 +53,17 @@ gen8_upload_ps_extra(struct brw_context *brw,<br>
dw1 |= GEN8_PSX_SHADER_IS_PER_SAMPLE;<br>
<br>
if (prog_data->uses_sample_mask) {<br>
- if (brw->gen >= 9)<br>
- dw1 |= BRW_PSICMS_INNER << GEN9_PSX_SHADER_NORMAL_<wbr>COVERAGE_MASK_SHIFT;<br>
- else<br>
+ if (brw->gen >= 9) {<br>
+ if (prog_data->post_depth_<wbr>coverage) {<br>
+ dw1 |= BRW_PCICMS_DEPTH << GEN9_PSX_SHADER_NORMAL_<wbr>COVERAGE_MASK_SHIFT;<br>
+ }<br>
+ else {<br>
+ dw1 |= BRW_PSICMS_INNER << GEN9_PSX_SHADER_NORMAL_<wbr>COVERAGE_MASK_SHIFT;<br>
+ }<br>
+ }<br>
+ else {<br>
dw1 |= GEN8_PSX_SHADER_USES_INPUT_<wbr>COVERAGE_MASK;<br>
+ }<br>
}<br>
<br>
if (prog_data->uses_omask)<br>
diff --git a/src/mesa/drivers/dri/i965/<wbr>intel_extensions.c b/src/mesa/drivers/dri/i965/<wbr>intel_extensions.c<br>
</div></div>index 66079b5..19f4684 100644<br>
--- a/src/mesa/drivers/dri/i965/<wbr>intel_extensions.c<br>
+++ b/src/mesa/drivers/dri/i965/<wbr>intel_extensions.c<br>
@@ -415,6 +415,7 @@ intelInitExtensions(struct gl_context *ctx)<br>
ctx->Extensions.KHR_texture_<wbr>compression_astc_ldr = true;<br>
ctx->Extensions.KHR_texture_<wbr>compression_astc_sliced_3d = true;<br>
ctx->Extensions.MESA_shader_<wbr>framebuffer_fetch = true;<br>
<span class="">+ ctx->Extensions.ARB_post_<wbr>depth_coverage = true;<br>
}<br>
<br>
</span> if (ctx->API == API_OPENGL_CORE)<br>
<span class="HOEnZb"><font color="#888888">--<br>
2.7.4<br>
<br>
</font></span></blockquote></div><br></div>