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<div class="moz-cite-prefix">On 01/12/16 04:02, Chris Forbes wrote:<br>
</div>
<blockquote
cite="mid:CAH3ygc0hfvaFvMYp-o33LAH98D=9kiVgRfq6eMa=2ekm7ieh-g@mail.gmail.com"
type="cite">
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<div dir="ltr">A couple of notes on existing weirdness here:
<div>- Naming of GEN9_PSX_SHADER_NORMAL_COVERAGE_MASK_SHIFT is
bizarre (not your fault)</div>
<div>- Is BRW_PSICMS_INNER really the right thing for the normal
mode? Why not BRW_PSICMS_NORMAL? Perhaps whoever added this
stuff can shed some light here?</div>
</div>
</blockquote>
<br>
Hi,<br>
<br>
I've noticed this as well and I have another change to use
BRW_PSICMS_NORMAL.<br>
My understanding is that this has NORMAL or INNER_CONSERVATIVE
produce the same result unless you set the
RASTER_CONSERVATIVE_RASTERIZATION_ENABLE bit in the 3DSTATE_RASTER
instruction.<br>
<br>
Cheers,<br>
<br>
-<br>
Lionel<br>
<br>
<blockquote
cite="mid:CAH3ygc0hfvaFvMYp-o33LAH98D=9kiVgRfq6eMa=2ekm7ieh-g@mail.gmail.com"
type="cite">
<div dir="ltr">
<div><br>
</div>
<div>Actual change here looks good, so:</div>
<div><br>
</div>
<div>Reviewed-by: Chris Forbes <<a moz-do-not-send="true"
href="mailto:chrisforbes@google.com">chrisforbes@google.com</a>></div>
<div><br>
</div>
</div>
<div class="gmail_extra"><br>
<div class="gmail_quote">On Thu, Dec 1, 2016 at 9:00 AM, Plamena
Manolova <span dir="ltr"><<a moz-do-not-send="true"
href="mailto:plamena.manolova@intel.com" target="_blank">plamena.manolova@intel.com</a>></span>
wrote:<br>
<blockquote class="gmail_quote" style="margin:0 0 0
.8ex;border-left:1px #ccc solid;padding-left:1ex"><span
class="">This extension allows the fragment shader to
control whether values in<br>
gl_SampleMaskIn[] reflect the coverage after application
of the early<br>
depth and stencil tests.<br>
<br>
Signed-off-by: Plamena Manolova <<a
moz-do-not-send="true"
href="mailto:plamena.manolova@intel.com">plamena.manolova@intel.com</a>><br>
---<br>
</span> docs/relnotes/13.1.0.html | 1 +<br>
<span class=""> src/mesa/drivers/dri/i965/brw_<wbr>compiler.h
| 1 +<br>
src/mesa/drivers/dri/i965/brw_<wbr>fs.cpp | 1 +<br>
src/mesa/drivers/dri/i965/<wbr>gen8_ps_state.c | 13
++++++++++---<br>
src/mesa/drivers/dri/i965/<wbr>intel_extensions.c | 1 +<br>
</span> 5 files changed, 14 insertions(+), 3 deletions(-)<br>
<br>
diff --git a/docs/relnotes/13.1.0.html
b/docs/relnotes/13.1.0.html<br>
index 4f76cc2..a160cda 100644<br>
--- a/docs/relnotes/13.1.0.html<br>
+++ b/docs/relnotes/13.1.0.html<br>
@@ -45,6 +45,7 @@ Note: some of the new features are only
available with certain drivers.<br>
<br>
<ul><br>
<li>GL_NV_image_formats on any driver supporting
GL_ARB_shader_image_load_store (i965, nvc0, radeonsi,
softpipe)</li><br>
+<li>GL_ARB_post_depth_<wbr>coverage on
i965/gen9+</li><br>
</ul><br>
<br>
<h2>Bug fixes</h2><br>
<span class="">diff --git a/src/mesa/drivers/dri/i965/<wbr>brw_compiler.h
b/src/mesa/drivers/dri/i965/<wbr>brw_compiler.h<br>
index 65a7478..410641f 100644<br>
--- a/src/mesa/drivers/dri/i965/<wbr>brw_compiler.h<br>
+++ b/src/mesa/drivers/dri/i965/<wbr>brw_compiler.h<br>
@@ -397,6 +397,7 @@ struct brw_wm_prog_data {<br>
bool computed_stencil;<br>
<br>
bool early_fragment_tests;<br>
+ bool post_depth_coverage;<br>
bool dispatch_8;<br>
bool dispatch_16;<br>
bool dual_src_blend;<br>
diff --git a/src/mesa/drivers/dri/i965/<wbr>brw_fs.cpp
b/src/mesa/drivers/dri/i965/<wbr>brw_fs.cpp<br>
</span>index c218f56..ce0c07e 100644<br>
--- a/src/mesa/drivers/dri/i965/<wbr>brw_fs.cpp<br>
+++ b/src/mesa/drivers/dri/i965/<wbr>brw_fs.cpp<br>
@@ -6454,6 +6454,7 @@ brw_compile_fs(const struct
brw_compiler *compiler, void *log_data,<br>
<div class="HOEnZb">
<div class="h5"> shader->info->outputs_read);<br>
<br>
prog_data->early_fragment_<wbr>tests =
shader->info->fs.early_<wbr>fragment_tests;<br>
+ prog_data->post_depth_coverage =
shader->info->fs.post_depth_<wbr>coverage;<br>
<br>
prog_data->barycentric_interp_<wbr>modes =<br>
brw_compute_barycentric_<wbr>interp_modes(compiler-><wbr>devinfo,
shader);<br>
diff --git a/src/mesa/drivers/dri/i965/<wbr>gen8_ps_state.c
b/src/mesa/drivers/dri/i965/<wbr>gen8_ps_state.c<br>
index a4eb962..33ef023 100644<br>
--- a/src/mesa/drivers/dri/i965/<wbr>gen8_ps_state.c<br>
+++ b/src/mesa/drivers/dri/i965/<wbr>gen8_ps_state.c<br>
@@ -53,10 +53,17 @@ gen8_upload_ps_extra(struct
brw_context *brw,<br>
dw1 |= GEN8_PSX_SHADER_IS_PER_SAMPLE;<br>
<br>
if (prog_data->uses_sample_mask) {<br>
- if (brw->gen >= 9)<br>
- dw1 |= BRW_PSICMS_INNER <<
GEN9_PSX_SHADER_NORMAL_<wbr>COVERAGE_MASK_SHIFT;<br>
- else<br>
+ if (brw->gen >= 9) {<br>
+ if (prog_data->post_depth_<wbr>coverage) {<br>
+ dw1 |= BRW_PCICMS_DEPTH <<
GEN9_PSX_SHADER_NORMAL_<wbr>COVERAGE_MASK_SHIFT;<br>
+ }<br>
+ else {<br>
+ dw1 |= BRW_PSICMS_INNER <<
GEN9_PSX_SHADER_NORMAL_<wbr>COVERAGE_MASK_SHIFT;<br>
+ }<br>
+ }<br>
+ else {<br>
dw1 |= GEN8_PSX_SHADER_USES_INPUT_<wbr>COVERAGE_MASK;<br>
+ }<br>
}<br>
<br>
if (prog_data->uses_omask)<br>
diff --git a/src/mesa/drivers/dri/i965/<wbr>intel_extensions.c
b/src/mesa/drivers/dri/i965/<wbr>intel_extensions.c<br>
index 66079b5..19f4684 100644<br>
--- a/src/mesa/drivers/dri/i965/<wbr>intel_extensions.c<br>
+++ b/src/mesa/drivers/dri/i965/<wbr>intel_extensions.c<br>
@@ -415,6 +415,7 @@ intelInitExtensions(struct
gl_context *ctx)<br>
ctx->Extensions.KHR_texture_<wbr>compression_astc_ldr
= true;<br>
ctx->Extensions.KHR_texture_<wbr>compression_astc_sliced_3d
= true;<br>
ctx->Extensions.MESA_shader_<wbr>framebuffer_fetch
= true;<br>
+ ctx->Extensions.ARB_post_<wbr>depth_coverage =
true;<br>
}<br>
<br>
if (ctx->API == API_OPENGL_CORE)<br>
--<br>
2.7.4<br>
<br>
______________________________<wbr>_________________<br>
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