<div dir="ltr">Reviewed-by: Jason Ekstrand <<a href="mailto:jason@jlekstrand.net">jason@jlekstrand.net</a>><br></div><div class="gmail_extra"><br><div class="gmail_quote">On Mon, Jan 16, 2017 at 1:13 AM, Topi Pohjolainen <span dir="ltr"><<a href="mailto:topi.pohjolainen@gmail.com" target="_blank">topi.pohjolainen@gmail.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Signed-off-by: Topi Pohjolainen <<a href="mailto:topi.pohjolainen@intel.com">topi.pohjolainen@intel.com</a>><br>
---<br>
 src/mesa/drivers/dri/i965/brw_<wbr>meta_util.c | 44 ------------------------------<wbr>-<br>
 src/mesa/drivers/dri/i965/brw_<wbr>meta_util.h |  5 ----<br>
 2 files changed, 49 deletions(-)<br>
<br>
diff --git a/src/mesa/drivers/dri/i965/<wbr>brw_meta_util.c b/src/mesa/drivers/dri/i965/<wbr>brw_meta_util.c<br>
index 6d6b692..07a160f 100644<br>
--- a/src/mesa/drivers/dri/i965/<wbr>brw_meta_util.c<br>
+++ b/src/mesa/drivers/dri/i965/<wbr>brw_meta_util.c<br>
@@ -267,50 +267,6 @@ brw_meta_mirror_clip_and_<wbr>scissor(const struct gl_context *ctx,<br>
 }<br>
<br>
 /**<br>
- * Creates a new named renderbuffer that wraps the first slice<br>
- * of an existing miptree.<br>
- *<br>
- * Clobbers the current renderbuffer binding (ctx->CurrentRenderbuffer).<br>
- */<br>
-struct gl_renderbuffer *<br>
-brw_get_rb_for_slice(struct brw_context *brw,<br>
-                     struct intel_mipmap_tree *mt,<br>
-                     unsigned level, unsigned layer, bool flat)<br>
-{<br>
-   struct gl_context *ctx = &brw->ctx;<br>
-   struct gl_renderbuffer *rb = ctx->Driver.NewRenderbuffer(<wbr>ctx, 0xDEADBEEF);<br>
-   struct intel_renderbuffer *irb = intel_renderbuffer(rb);<br>
-<br>
-   rb->RefCount = 1;<br>
-   rb->Format = mt->format;<br>
-   rb->_BaseFormat = _mesa_get_format_base_format(<wbr>mt->format);<br>
-<br>
-   /* Program takes care of msaa and mip-level access manually for stencil.<br>
-    * The surface is also treated as Y-tiled instead of as W-tiled calling for<br>
-    * twice the width and half the height in dimensions.<br>
-    */<br>
-   if (flat) {<br>
-      const unsigned halign_stencil = 8;<br>
-<br>
-      rb->NumSamples = 0;<br>
-      rb->Width = ALIGN(mt->total_width, halign_stencil) * 2;<br>
-      rb->Height = (mt->total_height / mt->physical_depth0) / 2;<br>
-      irb->mt_level = 0;<br>
-   } else {<br>
-      rb->NumSamples = mt->num_samples;<br>
-      rb->Width = mt->logical_width0;<br>
-      rb->Height = mt->logical_height0;<br>
-      irb->mt_level = level;<br>
-   }<br>
-<br>
-   irb->mt_layer = layer;<br>
-<br>
-   intel_miptree_reference(&irb-><wbr>mt, mt);<br>
-<br>
-   return rb;<br>
-}<br>
-<br>
-/**<br>
  * Determine if fast color clear supports the given clear color.<br>
  *<br>
  * Fast color clear can only clear to color values of 1.0 or 0.0.  At the<br>
diff --git a/src/mesa/drivers/dri/i965/<wbr>brw_meta_util.h b/src/mesa/drivers/dri/i965/<wbr>brw_meta_util.h<br>
index 93bc72c..207a54b 100644<br>
--- a/src/mesa/drivers/dri/i965/<wbr>brw_meta_util.h<br>
+++ b/src/mesa/drivers/dri/i965/<wbr>brw_meta_util.h<br>
@@ -57,11 +57,6 @@ brw_is_color_fast_clear_<wbr>compatible(struct brw_context *brw,<br>
                                    const struct intel_mipmap_tree *mt,<br>
                                    const union gl_color_union *color);<br>
<br>
-struct gl_renderbuffer *brw_get_rb_for_slice(struct brw_context *brw,<br>
-                                             struct intel_mipmap_tree *mt,<br>
-                                             unsigned level, unsigned layer,<br>
-                                             bool flat);<br>
-<br>
 #ifdef __cplusplus<br>
 }<br>
 #endif<br>
<span class="HOEnZb"><font color="#888888">--<br>
2.5.5<br>
<br>
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</font></span></blockquote></div><br></div>