<div dir="ltr"><div class="gmail_extra"><div class="gmail_quote">On Mon, Jan 23, 2017 at 10:21 PM, Ben Widawsky <span dir="ltr"><<a href="mailto:ben@bwidawsk.net" target="_blank">ben@bwidawsk.net</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">This patch begins introducing how we'll actually handle the potentially<br>
many modifiers coming in from the API, how we'll store them, and the<br>
structure in the code to support it.<br>
<br>
Prior to this patch, the Y-tiled modifier would be entirely ignored. It<br>
shouldn't actually be used until this point because we've not bumped the<br>
DRIimage extension version (which is a requirement to use modifiers).<br>
<br>
With X-tiling:<br>
Writes: 6,583.58 MiB<br>
Reads: 6,540.93 MiB<br>
<br>
With Y-tiling:<br>
Writes: 5,361.78 MiB<br>
Reads 6,052.45 MiB<br>
<br>
Savings per frame<br>
Writes: 2 MiB<br>
Reads: .8 MiB<br>
<br>
Similar functionality was introduced and then reverted here:<br>
<br>
commit 6a0d036483caf87d43ebe2edd19058<wbr>73446c9589<br>
Author: Ben Widawsky <<a href="mailto:ben@bwidawsk.net">ben@bwidawsk.net</a>><br>
Date: Thu Apr 21 20:14:58 2016 -0700<br>
<br>
i965: Always use Y-tiled buffers on SKL+<br>
<br>
Signed-off-by: Ben Widawsky <<a href="mailto:benjamin.widawsky@intel.com">benjamin.widawsky@intel.com</a>><br>
Reviewed-by: Eric Engestrom <<a href="mailto:eric.engestrom@imgtec.com">eric.engestrom@imgtec.com</a>><br>
Acked-by: Daniel Stone <<a href="mailto:daniels@collabora.com">daniels@collabora.com</a>><br>
---<br>
src/mesa/drivers/dri/i965/<wbr>intel_screen.c | 55 ++++++++++++++++++++++++++++--<wbr>--<br>
1 file changed, 49 insertions(+), 6 deletions(-)<br>
<br>
diff --git a/src/mesa/drivers/dri/i965/<wbr>intel_screen.c b/src/mesa/drivers/dri/i965/<wbr>intel_screen.c<br>
index ebfa74a8ff..6eaf146181 100644<br>
--- a/src/mesa/drivers/dri/i965/<wbr>intel_screen.c<br>
+++ b/src/mesa/drivers/dri/i965/<wbr>intel_screen.c<br>
@@ -23,6 +23,7 @@<br>
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.<br>
*/<br>
<br>
+#include <drm_fourcc.h><br>
#include <errno.h><br>
#include <time.h><br>
#include <unistd.h><br>
@@ -559,16 +560,35 @@ select_best_modifier(struct gen_device_info *devinfo,<br>
const uint64_t *modifiers,<br>
const unsigned count)<br>
{<br>
- uint64_t modifier = DRM_FORMAT_MOD_INVALID;<br>
+#define YTILE (1 << 1)<br>
+#define LINEAR (1 << 0)<br>
+<br>
+ const uint64_t prio_modifiers[] = { I915_FORMAT_MOD_Y_TILED, DRM_FORMAT_MOD_LINEAR };<br>
+ uint32_t modifier_bitmask = 0; /* API only allows 32 */<br></blockquote><div><br></div><div>Is 32 an API limitation? Only looking locally, it seems to just be a limitation of the algorithm used here for picking modifiers. Given that the algorithm can be easily extended if needed, I see no reason why we need to make it an API limitation.<br></div><div> </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
<br>
for (int i = 0; i < count; i++) {<br>
switch (modifiers[i]) {<br>
case DRM_FORMAT_MOD_LINEAR:<br>
- return modifiers[i];<br>
+ modifier_bitmask |= LINEAR;<br>
+ break;<br>
+ case I915_FORMAT_MOD_Y_TILED:<br>
+ if (devinfo->gen < 9) {<br>
+ _mesa_warning(NULL, "Invalid Y-tiling parameter\n");<br></blockquote><div><br></div><div>Why? We can support Y tiling on all our hardware, you just can't scan it out prior to Sky Lake. However, if you were doing mesa <-> mesa for compositing, Y-tiling is perfectly fine all the way back.<br></div><div> </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
+ continue;<br>
+ }<br>
+<br>
+ modifier_bitmask |= YTILE;<br>
+ break;<br>
}<br>
}<br>
<br>
- return modifier;<br>
+ if (modifier_bitmask)<br>
+ return prio_modifiers[ffsll(modifier_<wbr>bitmask)-1];<br>
+<br>
+ return DRM_FORMAT_MOD_INVALID;<br>
+<br>
+#undef LINEAR<br>
+#undef YTILE<br>
}<br>
<br>
static __DRIimage *<br>
@@ -599,6 +619,9 @@ __intel_create_image(__<wbr>DRIscreen *dri_screen,<br>
case DRM_FORMAT_MOD_LINEAR:<br>
tiling = I915_TILING_NONE;<br>
break;<br>
+ case I915_FORMAT_MOD_Y_TILED:<br>
+ tiling = I915_TILING_Y;<br>
+ break;<br>
case DRM_FORMAT_MOD_INVALID:<br>
default:<br>
break;<br>
@@ -650,8 +673,26 @@ intel_create_image_with_<wbr>modifiers(__DRIscreen *dri_screen,<br>
const unsigned count,<br>
void *loaderPrivate)<br>
{<br>
- return __intel_create_image(dri_<wbr>screen, width, height, format, 0, NULL, 0,<br>
- loaderPrivate);<br>
+ uint64_t local_mods[count];<br></blockquote><div><br></div><div>Should we really be stack allocating this? It comes in from the user and could be arbitrarily large. It's probably not a problem, but this patch got me thinking about modifier counts.<br></div><div> </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
+ int local_count = 0;<br>
+<br>
+ /* This compacts the actual modifiers to the ones we know how to handle */<br>
+ for (int i = 0; i < count; i++) {<br>
+ switch (modifiers[i]) {<br>
+ case I915_FORMAT_MOD_Y_TILED:<br>
+ case DRM_FORMAT_MOD_LINEAR:<br>
+ local_mods[local_count++] = modifiers[i];<br>
+ break;<br>
+ case DRM_FORMAT_MOD_INVALID:<br>
+ unreachable("Invalid modifiers specified\n");<br>
+ default:<br>
+ /* Modifiers from other vendors would land here. */<br>
+ break;<br>
+ }<br>
+ }<br>
+<br>
+ return __intel_create_image(dri_<wbr>screen, width, height, format, 0,<br>
+ local_mods, local_count, loaderPrivate);<br>
}<br>
<br>
static GLboolean<br>
@@ -1912,7 +1953,9 @@ intelAllocateBuffer(__<wbr>DRIscreen *dri_screen,<br>
if (intelBuffer == NULL)<br>
return NULL;<br>
<br>
- /* The front and back buffers are color buffers, which are X tiled. */<br>
+ /* The front and back buffers are color buffers, which are X tiled. GEN9+<br>
+ * supports Y tiled and compressed buffers, but there is no way to plumb that<br>
+ * through to here. */<br>
uint32_t tiling = I915_TILING_X;<br>
unsigned long pitch;<br>
int cpp = format / 8;<br>
<span class="HOEnZb"><font color="#888888">--<br>
2.11.0<br>
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