<div dir="ltr"><div class="gmail_extra"><div class="gmail_quote">On Mon, Feb 13, 2017 at 9:40 AM, Alex Smith <span dir="ltr"><<a href="mailto:asmith@feralinteractive.com" target="_blank">asmith@feralinteractive.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex"><div dir="ltr">Hi Lionel,<br><div class="gmail_extra"><br><div class="gmail_quote"><div><div class="gmail-h5">On 13 February 2017 at 17:28, Lionel Landwerlin <span dir="ltr"><<a href="mailto:lionel.g.landwerlin@intel.com" target="_blank">lionel.g.landwerlin@intel.com</a><wbr>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex"><div class="gmail-m_-4881448281881620661HOEnZb"><div class="gmail-m_-4881448281881620661h5">On 09/02/17 16:06, Alex Smith wrote:<br>
<blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">
This allows shaders to write to storage images declared with unknown<br>
format if they are decorated with NonReadable ("writeonly" in GLSL).<br>
<br>
Previously an image view would always use a lowered format for its<br>
surface state, however when a shader declares a write-only image, we<br>
should use the real format. Since we don't know at view creation time<br>
whether it will be used with only write-only images in shaders, create<br>
two surface states using both the original format and the lowered<br>
format. When emitting the binding table, choose between the states<br>
based on whether the image is declared write-only in the shader.<br>
<br>
Tested on both Sascha Willems' computeshader sample (with the original<br>
shaders and ones modified to declare images writeonly and omit their<br>
format qualifiers) and on our own shaders for which we need support<br>
for this.<br>
<br>
Signed-off-by: Alex Smith <<a href="mailto:asmith@feralinteractive.com" target="_blank">asmith@feralinteractive.com</a>><br>
---<br>
src/intel/vulkan/anv_device.c | 2 +-<br>
src/intel/vulkan/anv_image.c | 31 +++++++++++++++++++++++-<br>
src/intel/vulkan/anv_nir_apply<wbr>_pipeline_layout.c | 10 +++++---<br>
src/intel/vulkan/anv_pipeline.<wbr>c | 1 +<br>
src/intel/vulkan/anv_private.h<wbr> | 10 +++++++-<br>
src/intel/vulkan/genX_cmd_buff<wbr>er.c | 4 ++-<br>
6 files changed, 50 insertions(+), 8 deletions(-)<br>
<br>
diff --git a/src/intel/vulkan/anv_device.<wbr>c b/src/intel/vulkan/anv_device.<wbr>c<br>
index 91ee67f..46b83a3 100644<br>
--- a/src/intel/vulkan/anv_device.<wbr>c<br>
+++ b/src/intel/vulkan/anv_device.<wbr>c<br>
@@ -484,7 +484,7 @@ void anv_GetPhysicalDeviceFeatures(<br>
.shaderStorageImageExtendedFor<wbr>mats = true,<br>
.shaderStorageImageMultisample<wbr> = false,<br>
.shaderStorageImageReadWithout<wbr>Format = false,<br>
- .shaderStorageImageWriteWithou<wbr>tFormat = false,<br>
+ .shaderStorageImageWriteWithou<wbr>tFormat = true,<br>
.shaderUniformBufferArrayDynam<wbr>icIndexing = true,<br>
.shaderSampledImageArrayDynami<wbr>cIndexing = true,<br>
.shaderStorageBufferArrayDynam<wbr>icIndexing = true,<br>
diff --git a/src/intel/vulkan/anv_image.c b/src/intel/vulkan/anv_image.c<br>
index e59ef4d..1aeec44 100644<br>
--- a/src/intel/vulkan/anv_image.c<br>
+++ b/src/intel/vulkan/anv_image.c<br>
@@ -583,13 +583,29 @@ anv_CreateImageView(VkDevice _device,<br>
/* NOTE: This one needs to go last since it may stomp isl_view.format */<br>
if (image->usage & VK_IMAGE_USAGE_STORAGE_BIT) {<br>
iview->storage_surface_state = alloc_surface_state(device);<br>
+ iview->writeonly_storage_surfa<wbr>ce_state = alloc_surface_state(device);<br>
if (isl_has_matching_typed_storag<wbr>e_image_format(&device->info,<br>
format.isl_format)) {<br>
struct isl_view view = iview->isl;<br>
view.usage |= ISL_SURF_USAGE_STORAGE_BIT;<br>
+<br>
+ /* Write-only accesses should use the real format. */<br>
+ isl_surf_fill_state(&device-><wbr>isl_dev,<br>
+ iview->writeonly_storage_surf<wbr>ace_state.map,<br>
+ .surf = &surface->isl,<br>
+ .view = &view,<br>
+ .aux_surf = &image->aux_surface.isl,<br>
+ .aux_usage = surf_usage,<br>
+ .mocs = device->default_mocs);<br>
+<br>
+ /* Typed surface reads support a very limited subset of the shader<br>
+ * image formats. Translate it into the closest format the hardware<br>
+ * supports.<br>
+ */<br>
view.format = isl_lower_storage_image_format<wbr>(&device->info,<br>
format.isl_format);<br>
+<br>
isl_surf_fill_state(&device-><wbr>isl_dev,<br>
iview->storage_surface_state.<wbr>map,<br>
.surf = &surface->isl,<br>
@@ -602,16 +618,24 @@ anv_CreateImageView(VkDevice _device,<br>
ISL_FORMAT_RAW,<br>
iview->offset,<br>
iview->bo->size - iview->offset, 1);<br>
+ anv_fill_buffer_surface_state<wbr>(device,<br>
+ iview->writeonly_storage_surf<wbr>ace_state,<br>
+ ISL_FORMAT_RAW,<br>
+ iview->offset,<br>
+ iview->bo->size - iview->offset, 1);<br>
}<br>
isl_surf_fill_image_param(&dev<wbr>ice->isl_dev,<br>
&iview->storage_image_param,<br>
&surface->isl, &iview->isl);<br>
- if (!device->info.has_llc)<br>
+ if (!device->info.has_llc) {<br>
anv_state_clflush(iview->stor<wbr>age_surface_state);<br>
+ anv_state_clflush(iview->writ<wbr>eonly_storage_surface_state);<br>
+ }<br>
} else {<br>
iview->storage_surface_state.a<wbr>lloc_size = 0;<br>
+ iview->writeonly_storage_surfa<wbr>ce_state.alloc_size = 0;<br>
}<br>
*pView = anv_image_view_to_handle(iview<wbr>);<br>
@@ -639,6 +663,11 @@ anv_DestroyImageView(VkDevice _device, VkImageView _iview,<br>
iview->storage_surface_state);<br>
}<br>
+ if (iview->writeonly_storage_surf<wbr>ace_state.alloc_size > 0) {<br>
+ anv_state_pool_free(&device->s<wbr>urface_state_pool,<br>
+ iview->writeonly_storage_surfa<wbr>ce_state);<br>
+ }<br>
+<br>
vk_free2(&device->alloc, pAllocator, iview);<br>
}<br>
diff --git a/src/intel/vulkan/anv_nir_app<wbr>ly_pipeline_layout.c b/src/intel/vulkan/anv_nir_app<wbr>ly_pipeline_layout.c<br>
index 8846c2e..296fd05 100644<br>
--- a/src/intel/vulkan/anv_nir_app<wbr>ly_pipeline_layout.c<br>
+++ b/src/intel/vulkan/anv_nir_app<wbr>ly_pipeline_layout.c<br>
@@ -351,9 +351,6 @@ anv_nir_apply_pipeline_layout(<wbr>struct anv_pipeline *pipeline,<br>
continue;<br>
enum glsl_sampler_dim dim = glsl_get_sampler_dim(var->inte<wbr>rface_type);<br>
- if (dim != GLSL_SAMPLER_DIM_SUBPASS &&<br>
- dim != GLSL_SAMPLER_DIM_SUBPASS_MS)<br>
- continue;<br>
const uint32_t set = var->data.descriptor_set;<br>
const uint32_t binding = var->data.binding;<br>
@@ -369,7 +366,12 @@ anv_nir_apply_pipeline_layout(<wbr>struct anv_pipeline *pipeline,<br>
assert(pipe_binding[i].set == set);<br>
assert(pipe_binding[i].bindin<wbr>g == binding);<br>
assert(pipe_binding[i].index == i);<br>
- pipe_binding[i].input_attachm<wbr>ent_index = var->data.index + i;<br>
+<br>
+ if (dim != GLSL_SAMPLER_DIM_SUBPASS &&<br>
+ dim != GLSL_SAMPLER_DIM_SUBPASS_MS)<br>
</blockquote>
<br></div></div>
This condition is incorrect, now that you moved it here, it should be<br>
<br>
if (dim == GLSL_SAMPLER_DIM_SUBPASS ||<br>
dim == GLSL_SAMPLER_DIM_SUBPASS_MS)<br>
<br>
With that fixed, this patch is :<br>
<br>
Reviewed-by: Lionel Landwerlin <<a href="mailto:lionel.g.landwerlin@intel.com" target="_blank">lionel.g.landwerlin@intel.com</a><wbr>></blockquote><div><br></div></div></div><div>Oops, thanks for that, I'll fix that as well.</div></div></div></div></blockquote><div><br></div><div>It would be good to run the CTS with at least dEQP-VK.image.load_store.* to make sure you didn't break anything before you re-send. If you're not familiar with running dEQP, it's just<br><br></div><div>./deqp-vk -n 'dEQP-VK.image.load_store.*<span class="">'</span><br><br></div><div>The quotes matter because dEQP needs to see the "*" not your shell.<br><br></div><div>--Jason<br></div><div> </div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex"><div dir="ltr"><div class="gmail_extra"><div class="gmail_quote"><span class="gmail-HOEnZb"><font color="#888888"><div>Alex</div></font></span><div><div class="gmail-h5"><div> </div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex"><div class="gmail-m_-4881448281881620661HOEnZb"><div class="gmail-m_-4881448281881620661h5"><br>
<br>
<blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">
+ pipe_binding[i].input_attachme<wbr>nt_index = var->data.index + i;<br>
+<br>
+ pipe_binding[i].write_only = var->data.image.write_only;<br>
}<br>
}<br>
diff --git a/src/intel/vulkan/anv_pipelin<wbr>e.c b/src/intel/vulkan/anv_pipelin<wbr>e.c<br>
index ca3823c..4410103 100644<br>
--- a/src/intel/vulkan/anv_pipelin<wbr>e.c<br>
+++ b/src/intel/vulkan/anv_pipelin<wbr>e.c<br>
@@ -128,6 +128,7 @@ anv_shader_compile_to_nir(stru<wbr>ct anv_device *device,<br>
.float64 = device->instance->physicalDevi<wbr>ce.info.gen >= 8,<br>
.tessellation = true,<br>
.draw_parameters = true,<br>
+ .image_write_without_format = true,<br>
};<br>
nir_function *entry_point =<br>
diff --git a/src/intel/vulkan/anv_private<wbr>.h b/src/intel/vulkan/anv_private<wbr>.h<br>
index 51e85c7..8db851a 100644<br>
--- a/src/intel/vulkan/anv_private<wbr>.h<br>
+++ b/src/intel/vulkan/anv_private<wbr>.h<br>
@@ -953,6 +953,9 @@ struct anv_pipeline_binding {<br>
/* Input attachment index (relative to the subpass) */<br>
uint8_t input_attachment_index;<br>
+<br>
+ /* For a storage image, whether it is write-only */<br>
+ bool write_only;<br>
};<br>
struct anv_pipeline_layout {<br>
@@ -1683,8 +1686,13 @@ struct anv_image_view {<br>
/** RENDER_SURFACE_STATE when using image as a sampler surface. */<br>
struct anv_state sampler_surface_state;<br>
- /** RENDER_SURFACE_STATE when using image as a storage image. */<br>
+ /**<br>
+ * RENDER_SURFACE_STATE when using image as a storage image. Separate states<br>
+ * for write-only and readable, using the real format for write-only and the<br>
+ * lowered format for readable.<br>
+ */<br>
struct anv_state storage_surface_state;<br>
+ struct anv_state writeonly_storage_surface_stat<wbr>e;<br>
struct brw_image_param storage_image_param;<br>
};<br>
diff --git a/src/intel/vulkan/genX_cmd_bu<wbr>ffer.c b/src/intel/vulkan/genX_cmd_bu<wbr>ffer.c<br>
index 8db26e9..b80159b 100644<br>
--- a/src/intel/vulkan/genX_cmd_bu<wbr>ffer.c<br>
+++ b/src/intel/vulkan/genX_cmd_bu<wbr>ffer.c<br>
@@ -1211,7 +1211,9 @@ emit_binding_table(struct anv_cmd_buffer *cmd_buffer,<br>
break;<br>
case VK_DESCRIPTOR_TYPE_STORAGE_IMA<wbr>GE: {<br>
- surface_state = desc->image_view->storage_surf<wbr>ace_state;<br>
+ surface_state = (binding->write_only)<br>
+ ? desc->image_view->writeonly_st<wbr>orage_surface_state<br>
+ : desc->image_view->storage_surf<wbr>ace_state;<br>
assert(surface_state.alloc_si<wbr>ze);<br>
add_image_view_relocs(cmd_buf<wbr>fer, desc->image_view,<br>
desc->image_view->image->aux_<wbr>usage,<br>
</blockquote>
<br>
<br>
</div></div></blockquote></div></div></div><br></div></div>
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