<div dir="ltr"><div class="gmail_extra"><div class="gmail_quote">On Thu, Feb 23, 2017 at 11:08 PM, Michael Schellenberger Costa <span dir="ltr"><<a href="mailto:mschellenbergercosta@googlemail.com" target="_blank">mschellenbergercosta@googlemail.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">Hi Jason,<br>
<br>
how much of a noob task would the expansion to other operations be?<br></blockquote><div><br></div><div>It shouldn't be too bad. Last night, I cracked out a bunch more lowering helpers. I haven't tested them yet but they should be roughly what we need:<br><br><a href="https://cgit.freedesktop.org/~jekstrand/mesa/log/?h=wip/nir-int64">https://cgit.freedesktop.org/~jekstrand/mesa/log/?h=wip/nir-int64</a><br><br></div><div>I think all that's left after that is shifts, bcsel, and conversions (int <-> float etc.). It should be fairly easy to write. Debugging will require learning a bit about the compiler stack but this is as good a learning opportunity as any.<br><br></div><div>--Jason<br></div><div> </div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">
--Michael<br>
<br>
-----Ursprüngliche Nachricht-----<br>
Von: mesa-dev [mailto:<a href="mailto:mesa-dev-bounces@lists.freedesktop.org">mesa-dev-bounces@<wbr>lists.freedesktop.org</a>] Im Auftrag von Jason Ekstrand<br>
Gesendet: Freitag, 24. Februar 2017 02:15<br>
An: <a href="mailto:mesa-dev@lists.freedesktop.org">mesa-dev@lists.freedesktop.org</a><br>
Cc: Jason Ekstrand <<a href="mailto:jason.ekstrand@intel.com">jason.ekstrand@intel.com</a>><br>
Betreff: [Mesa-dev] [PATCH 0/8] anv: Add int64 support for gen8+<br>
<div><div class="gmail-h5"><br>
This little series adds int64 support to Vulkan on Broadwell and newer hardware. In theory, we could also support it on gen7 but that requires more lowering code to be written.<br>
<br>
Most of this series is the nir_builder control-flow stuff that I sent out earlier with a small addition to make it easy to add phi instructions after an if statement. Next comes an int64 lowering pass in NIR that mirrors the GLSL IR pass written by Ian.<br>
<br>
The second-to-last patch makes i965 use the new NIR pass rather than the GLSL IR one. There are two reasons for this. First, is that GL gets better int64 test coverage than Vulkan does at the moment. Second, this means that we get at least one run of the NIR optimization loop (including<br>
nir_opt_algebraic) before we do 64-bit integer lowering and we may be able to get rid of some instructions instead of having to lower them.<br>
<br>
Finally, it turns it in in the Vulkan driver for gen8+. Once the lowering pass gets expanded to handle the rest of the integer operations (maybe a good noob task?), we can turn it on for gen7.<br>
<br>
Jason Ekstrand (8):<br>
nir/builder: Add support for easily building control-flow<br>
glsl/nir: Use nir_builder's new control-flow helpers<br>
nir/lower_gs_intrinsics: Use nir_builder control-flow helpers<br>
nir/lower_indirect: Use nir_builder control-flow helpers<br>
spirv: Use nir_builder for control flow<br>
nir: Add a simple int64 lowering pass<br>
i965: Do int64 lowering in NIR<br>
anv: Advertise shaderInt64 on Broadwell and above<br>
<br>
src/compiler/Makefile.sources | 1 +<br>
src/compiler/glsl/glsl_to_nir.<wbr>cpp | 38 ++--<br>
src/compiler/nir/nir.h | 11 ++<br>
src/compiler/nir/nir_builder.h | 95 +++++++++<br>
src/compiler/nir/nir_lower_gs_<wbr>intrinsics.c | 9 +-<br>
src/compiler/nir/nir_lower_<wbr>indirect_derefs.c | 35 +---<br>
src/compiler/nir/nir_lower_<wbr>int64.c | 275 +++++++++++++++++++++++++++<br>
src/compiler/spirv/vtn_cfg.c | 45 ++---<br>
src/intel/vulkan/anv_device.c | 2 +-<br>
src/mesa/drivers/dri/i965/brw_<wbr>link.cpp | 5 -<br>
src/mesa/drivers/dri/i965/brw_<wbr>nir.c | 7 +<br>
11 files changed, 423 insertions(+), 100 deletions(-) create mode 100644 src/compiler/nir/nir_lower_<wbr>int64.c<br>
<br>
--<br>
2.5.0.400.gff86faf<br>
<br>
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