<div dir="ltr"><div class="gmail_extra"><div class="gmail_quote">On Wed, Apr 5, 2017 at 11:59 AM, Pohjolainen, Topi <span dir="ltr"><<a href="mailto:topi.pohjolainen@gmail.com" target="_blank">topi.pohjolainen@gmail.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex"><div class="gmail-HOEnZb"><div class="gmail-h5">On Wed, Apr 05, 2017 at 09:10:45AM -0700, Jason Ekstrand wrote:<br>
> On Wed, Apr 5, 2017 at 1:04 AM, Pohjolainen, Topi <<br>
> <a href="mailto:topi.pohjolainen@gmail.com">topi.pohjolainen@gmail.com</a>> wrote:<br>
><br>
> > On Tue, Apr 04, 2017 at 03:56:35PM -0700, Jason Ekstrand wrote:<br>
> > > ---<br>
> > > src/intel/Makefile.sources | 7 ++<br>
> > > src/intel/isl/isl.c | 93 ++++++++++++++++<br>
> > > src/intel/isl/isl.h | 82 ++++++++++++++<br>
> > > src/intel/isl/isl_emit_depth_<wbr>stencil.c | 189<br>
> > ++++++++++++++++++++++++++++++<wbr>+++<br>
> > > src/intel/isl/isl_priv.h | 28 +++++<br>
> > > 5 files changed, 399 insertions(+)<br>
> > > create mode 100644 src/intel/isl/isl_emit_depth_<wbr>stencil.c<br>
> > ><br>
> > > diff --git a/src/intel/Makefile.sources b/src/intel/Makefile.sources<br>
> > > index c568916..df8c868 100644<br>
> > > --- a/src/intel/Makefile.sources<br>
> > > +++ b/src/intel/Makefile.sources<br>
> > > @@ -150,32 +150,39 @@ ISL_FILES = \<br>
> > > ISL_GEN4_FILES = \<br>
> > > isl/isl_gen4.c \<br>
> > > isl/isl_gen4.h \<br>
> > > + isl/isl_emit_depth_stencil.c \<br>
> > > isl/isl_surface_state.c<br>
> > ><br>
> > > ISL_GEN5_FILES = \<br>
> > > + isl/isl_emit_depth_stencil.c \<br>
> > > isl/isl_surface_state.c<br>
> > ><br>
> > > ISL_GEN6_FILES = \<br>
> > > isl/isl_gen6.c \<br>
> > > isl/isl_gen6.h \<br>
> > > + isl/isl_emit_depth_stencil.c \<br>
> > > isl/isl_surface_state.c<br>
> > ><br>
> > > ISL_GEN7_FILES = \<br>
> > > isl/isl_gen7.c \<br>
> > > isl/isl_gen7.h \<br>
> > > + isl/isl_emit_depth_stencil.c \<br>
> > > isl/isl_surface_state.c<br>
> > ><br>
> > > ISL_GEN75_FILES = \<br>
> > > + isl/isl_emit_depth_stencil.c \<br>
> > > isl/isl_surface_state.c<br>
> > ><br>
> > > ISL_GEN8_FILES = \<br>
> > > isl/isl_gen8.c \<br>
> > > isl/isl_gen8.h \<br>
> > > + isl/isl_emit_depth_stencil.c \<br>
> > > isl/isl_surface_state.c<br>
> > ><br>
> > > ISL_GEN9_FILES = \<br>
> > > isl/isl_gen9.c \<br>
> > > isl/isl_gen9.h \<br>
> > > + isl/isl_emit_depth_stencil.c \<br>
> > > isl/isl_surface_state.c<br>
> > ><br>
> > > ISL_GENERATED_FILES = \<br>
> > > diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c<br>
> > > index 4e89991..f89f351 100644<br>
> > > --- a/src/intel/isl/isl.c<br>
> > > +++ b/src/intel/isl/isl.c<br>
> > > @@ -83,6 +83,32 @@ isl_device_init(struct isl_device *dev,<br>
> > > */<br>
> > > dev->ss.aux_addr_offset =<br>
> > > (RENDER_SURFACE_STATE_<wbr>AuxiliarySurfaceBaseAddress_<wbr>start(info) &<br>
> > ~31) / 8;<br>
> > > +<br>
> > > + dev->ds.size =<br>
> > > + _3DSTATE_DEPTH_BUFFER_length(<wbr>info) * 4 +<br>
> > > + _3DSTATE_STENCIL_BUFFER_<wbr>length(info) * 4 +<br>
> > > + _3DSTATE_HIER_DEPTH_BUFFER_<wbr>length(info) * 4 +<br>
> > > + _3DSTATE_CLEAR_PARAMS_length(<wbr>info) * 4;<br>
> > > +<br>
> > > + assert(_3DSTATE_DEPTH_BUFFER_<wbr>SurfaceBaseAddress_start(info) % 8 ==<br>
> > 0);<br>
> > > + dev->ds.depth_offset =<br>
> > > + _3DSTATE_DEPTH_BUFFER_<wbr>SurfaceBaseAddress_start(info) / 8;<br>
> > > +<br>
> > > + if (info->has_hiz_and_separate_<wbr>stencil) {<br>
> > > + assert(_3DSTATE_STENCIL_<wbr>BUFFER_SurfaceBaseAddress_<wbr>start(info) %<br>
> > 8 == 0);<br>
> > > + dev->ds.stencil_offset =<br>
> > > + _3DSTATE_DEPTH_BUFFER_length(<wbr>info) * 4 +<br>
> > > + _3DSTATE_STENCIL_BUFFER_<wbr>SurfaceBaseAddress_start(info) / 8;<br>
> > > +<br>
> > > + assert(_3DSTATE_HIER_DEPTH_<wbr>BUFFER_SurfaceBaseAddress_<wbr>start(info)<br>
> > % 8 == 0);<br>
> > > + dev->ds.hiz_offset =<br>
> > > + _3DSTATE_DEPTH_BUFFER_length(<wbr>info) * 4 +<br>
> > > + _3DSTATE_STENCIL_BUFFER_<wbr>length(info) * 4 +<br>
> > > + _3DSTATE_HIER_DEPTH_BUFFER_<wbr>SurfaceBaseAddress_start(info) / 8;<br>
> > > + } else {<br>
> > > + dev->ds.stencil_offset = 0;<br>
> > > + dev->ds.hiz_offset = 0;<br>
> > > + }<br>
> > > }<br>
> > ><br>
> > > /**<br>
> > > @@ -1684,6 +1710,73 @@ isl_buffer_fill_state_s(const struct isl_device<br>
> > *dev, void *state,<br>
> > > }<br>
> > > }<br>
> > ><br>
> > > +void<br>
> > > +isl_emit_depth_stencil_hiz_s(<wbr>const struct isl_device *dev, void *batch,<br>
> > > + const struct isl_depth_stencil_hiz_emit_<wbr>info<br>
> > *restrict info)<br>
> > > +{<br>
> > > + if (info->depth_surf && info->stencil_surf) {<br>
> > > + if (!dev->info->has_hiz_and_<wbr>separate_stencil) {<br>
> > > + assert(info->depth_surf == info->stencil_surf);<br>
> > > + assert(info->depth_address == info->stencil_address);<br>
> > > + }<br>
> > > + assert(info->depth_surf->dim == info->stencil_surf->dim);<br>
> > > + }<br>
> > > +<br>
> > > + if (info->depth_surf) {<br>
> > > + assert((info->depth_surf-><wbr>usage & ISL_SURF_USAGE_DEPTH_BIT));<br>
> > > + if (info->depth_surf->dim == ISL_SURF_DIM_3D) {<br>
> > > + assert(info->view->base_array_<wbr>layer + info->view->array_len <=<br>
> > > + info->depth_surf->logical_<wbr>level0_px.depth);<br>
> > > + } else {<br>
> > > + assert(info->view->base_array_<wbr>layer + info->view->array_len <=<br>
> > > + info->depth_surf->logical_<wbr>level0_px.array_len);<br>
> > > + }<br>
> > > + }<br>
> > > +<br>
> > > + if (info->stencil_surf) {<br>
> > > + assert((info->stencil_surf-><wbr>usage & ISL_SURF_USAGE_STENCIL_BIT));<br>
> > > + if (info->stencil_surf->dim == ISL_SURF_DIM_3D) {<br>
> > > + assert(info->view->base_array_<wbr>layer + info->view->array_len <=<br>
> > > + info->stencil_surf->logical_<wbr>level0_px.depth);<br>
> > > + } else {<br>
> > > + assert(info->view->base_array_<wbr>layer + info->view->array_len <=<br>
> > > + info->stencil_surf->logical_<wbr>level0_px.array_len);<br>
> > > + }<br>
> > > + }<br>
> > > +<br>
> > > + switch (ISL_DEV_GEN(dev)) {<br>
> > > + case 4:<br>
> > > + if (ISL_DEV_IS_G4X(dev)) {<br>
> > > + /* G45 surface state is the same as gen5 */<br>
> > > + isl_gen5_emit_depth_stencil_<wbr>hiz_s(dev, batch, info);<br>
> > > + } else {<br>
> > > + isl_gen4_emit_depth_stencil_<wbr>hiz_s(dev, batch, info);<br>
> > > + }<br>
> > > + break;<br>
> > > + case 5:<br>
> > > + isl_gen5_emit_depth_stencil_<wbr>hiz_s(dev, batch, info);<br>
> > > + break;<br>
> > > + case 6:<br>
> > > + isl_gen6_emit_depth_stencil_<wbr>hiz_s(dev, batch, info);<br>
> > > + break;<br>
> > > + case 7:<br>
> > > + if (ISL_DEV_IS_HASWELL(dev)) {<br>
> > > + isl_gen75_emit_depth_stencil_<wbr>hiz_s(dev, batch, info);<br>
> > > + } else {<br>
> > > + isl_gen7_emit_depth_stencil_<wbr>hiz_s(dev, batch, info);<br>
> > > + }<br>
> > > + break;<br>
> > > + case 8:<br>
> > > + isl_gen8_emit_depth_stencil_<wbr>hiz_s(dev, batch, info);<br>
> > > + break;<br>
> > > + case 9:<br>
> > > + isl_gen9_emit_depth_stencil_<wbr>hiz_s(dev, batch, info);<br>
> > > + break;<br>
> > > + default:<br>
> > > + assert(!"Cannot fill surface state for this gen");<br>
> > > + }<br>
> > > +}<br>
> > > +<br>
> > > /**<br>
> > > * A variant of isl_surf_get_image_offset_sa() specific to<br>
> > > * ISL_DIM_LAYOUT_GEN4_2D.<br>
> > > diff --git a/src/intel/isl/isl.h b/src/intel/isl/isl.h<br>
> > > index 17b52cf..73ef2b6 100644<br>
> > > --- a/src/intel/isl/isl.h<br>
> > > +++ b/src/intel/isl/isl.h<br>
> > > @@ -682,6 +682,17 @@ struct isl_device {<br>
> > > uint8_t addr_offset;<br>
> > > uint8_t aux_addr_offset;<br>
> > > } ss;<br>
> > > +<br>
> > > + /**<br>
> > > + * Describes the layout of the depth/stencil/hiz commands as emitted<br>
> > by<br>
> > > + * isl_emit_depth_stencil_hiz.<br>
> > > + */<br>
> > > + struct {<br>
> > > + uint8_t size;<br>
> > > + uint8_t depth_offset;<br>
> > > + uint8_t stencil_offset;<br>
> > > + uint8_t hiz_offset;<br>
> > > + } ds;<br>
> > > };<br>
> > ><br>
> > > struct isl_extent2d {<br>
> > > @@ -1017,6 +1028,69 @@ struct isl_buffer_fill_state_info {<br>
> > > uint32_t stride;<br>
> > > };<br>
> > ><br>
> > > +struct isl_depth_stencil_hiz_emit_<wbr>info {<br>
> > > + /**<br>
> > > + * The depth surface<br>
> > > + */<br>
> > > + const struct isl_surf *depth_surf;<br>
> > > +<br>
> > > + /**<br>
> > > + * The stencil surface<br>
> > > + *<br>
> > > + * If separate stencil is not available, this must point to the same<br>
> > > + * isl_surf as depth_surf.<br>
> > > + */<br>
> > > + const struct isl_surf *stencil_surf;<br>
> > > +<br>
> > > + /**<br>
> > > + * The view into the depth and stencil surfaces.<br>
> > > + *<br>
> > > + * This view applies to both surfaces simultaneously.<br>
> > > + */<br>
> > > + const struct isl_view *view;<br>
> > > +<br>
> > > + /**<br>
> > > + * The size of the framebuffer<br>
> > > + *<br>
> > > + * This is used as a back-up to provide a width and height if both<br>
> > > + * depth_surf and stencil_surf are NULL.<br>
> > > + */<br>
> > > + struct isl_extent2d fb_extent;<br>
> > > +<br>
> > > + /**<br>
> > > + * The address of the depth surface in GPU memory<br>
> > > + */<br>
> > > + uint64_t depth_address;<br>
> > > +<br>
> > > + /**<br>
> > > + * The address of the stencil surface in GPU memory<br>
> > > + *<br>
> > > + * If separate stencil is not available, this must have the same<br>
> > value as<br>
> > > + * depth_address.<br>
> > > + */<br>
> > > + uint64_t stencil_address;<br>
> > > +<br>
> > > + /**<br>
> > > + * The Memory Object Control state for depth and stencil buffers<br>
> > > + *<br>
> > > + * Both depth and stencil will get the same MOCS value. The exact<br>
> > format<br>
> > > + * of this value depends on hardware generation.<br>
> > > + */<br>
> > > + uint32_t mocs;<br>
> > > +<br>
> > > + /**<br>
> > > + * The HiZ surfae or NULL if HiZ is disabled.<br>
> ><br>
> > surface<br>
> ><br>
><br>
> Yup. Fixed locally.<br>
><br>
><br>
> > > + */<br>
> > > + const struct isl_surf *hiz_surf;<br>
> > > + enum isl_aux_usage hiz_usage;<br>
> > > + uint64_t hiz_address;<br>
> > > +<br>
> > > + /**<br>
> > > + * The depth clear value<br>
> > > + */<br>
> > > + float depth_clear_value;<br>
> > > +};<br>
> > > +<br>
> > > extern const struct isl_format_layout isl_format_layouts[];<br>
> > ><br>
> > > void<br>
> > > @@ -1315,6 +1389,14 @@ void<br>
> > > isl_buffer_fill_state_s(const struct isl_device *dev, void *state,<br>
> > > const struct isl_buffer_fill_state_info<br>
> > *restrict info);<br>
> > ><br>
> > > +#define isl_emit_depth_stencil_hiz(<wbr>dev, batch, ...) \<br>
> > > + isl_emit_depth_stencil_hiz_s((<wbr>dev), (batch), \<br>
> > > + &(struct isl_depth_stencil_hiz_emit_<wbr>info)<br>
> > { __VA_ARGS__ })<br>
> > > +<br>
> > > +void<br>
> > > +isl_emit_depth_stencil_hiz_s(<wbr>const struct isl_device *dev, void *batch,<br>
> > > + const struct isl_depth_stencil_hiz_emit_<wbr>info<br>
> > *restrict info);<br>
> > > +<br>
> > > void<br>
> > > isl_surf_fill_image_param(<wbr>const struct isl_device *dev,<br>
> > > struct brw_image_param *param,<br>
> > > diff --git a/src/intel/isl/isl_emit_<wbr>depth_stencil.c<br>
> > b/src/intel/isl/isl_emit_<wbr>depth_stencil.c<br>
> > > new file mode 100644<br>
> > > index 0000000..d641b5b<br>
> > > --- /dev/null<br>
> > > +++ b/src/intel/isl/isl_emit_<wbr>depth_stencil.c<br>
> > > @@ -0,0 +1,189 @@<br>
> > > +/*<br>
> > > + * Copyright 2016 Intel Corporation<br>
> > > + *<br>
> > > + * Permission is hereby granted, free of charge, to any person<br>
> > obtaining a<br>
> > > + * copy of this software and associated documentation files (the<br>
> > "Software"),<br>
> > > + * to deal in the Software without restriction, including without<br>
> > limitation<br>
> > > + * the rights to use, copy, modify, merge, publish, distribute,<br>
> > sublicense,<br>
> > > + * and/or sell copies of the Software, and to permit persons to whom<br>
> > the<br>
> > > + * Software is furnished to do so, subject to the following conditions:<br>
> > > + *<br>
> > > + * The above copyright notice and this permission notice (including<br>
> > the next<br>
> > > + * paragraph) shall be included in all copies or substantial portions<br>
> > of the<br>
> > > + * Software.<br>
> > > + *<br>
> > > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,<br>
> > EXPRESS OR<br>
> > > + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF<br>
> > MERCHANTABILITY,<br>
> > > + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT<br>
> > SHALL<br>
> > > + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES<br>
> > OR OTHER<br>
> > > + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,<br>
> > ARISING<br>
> > > + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER<br>
> > DEALINGS<br>
> > > + * IN THE SOFTWARE.<br>
> > > + */<br>
> > > +<br>
> > > +#include <stdint.h><br>
> > > +<br>
> > > +#define __gen_address_type uint64_t<br>
> > > +#define __gen_user_data void<br>
> > > +<br>
> > > +static inline uint64_t<br>
> > > +__gen_combine_address(void *data, void *loc, uint64_t addr, uint32_t<br>
> > delta)<br>
> > > +{<br>
> > > + return addr + delta;<br>
> > > +}<br>
> > > +<br>
> > > +#include "genxml/gen_macros.h"<br>
> > > +#include "genxml/genX_pack.h"<br>
> > > +<br>
> > > +#include "isl_priv.h"<br>
> > > +<br>
> > > +#define __PASTE2(x, y) x ## y<br>
> > > +#define __PASTE(x, y) __PASTE2(x, y)<br>
> > > +#define isl_genX(x) __PASTE(isl_, genX(x))<br>
> > > +<br>
> > > +static const uint32_t isl_to_gen_ds_surftype [] = {<br>
> ><br>
> > Intentional space before []?<br>
> ><br>
><br>
> Thanks. Fixed locally.<br>
><br>
><br>
> > > +#if GEN_GEN >= 9<br>
> > > + /* From the SKL PRM, "3DSTATE_DEPTH_STENCIL::<wbr>SurfaceType":<br>
> > > + *<br>
> > > + * "If depth/stencil is enabled with 1D render target,<br>
> > depth/stencil<br>
> > > + * surface type needs to be set to 2D surface type and height set<br>
> > to 1.<br>
> > > + * Depth will use (legacy) TileY and stencil will use TileW. For<br>
> > this<br>
> > > + * case only, the Surface Type of the depth buffer can be 2D<br>
> > while the<br>
> > > + * Surface Type of the render target(s) are 1D, representing an<br>
> > > + * exception to a programming note above.<br>
> > > + */<br>
> > > + [ISL_SURF_DIM_1D] = SURFTYPE_2D,<br>
> > > +#else<br>
> > > + [ISL_SURF_DIM_1D] = SURFTYPE_1D,<br>
> > > +#endif<br>
> > > + [ISL_SURF_DIM_2D] = SURFTYPE_2D,<br>
> > > + [ISL_SURF_DIM_3D] = SURFTYPE_3D,<br>
> > > +};<br>
> > > +<br>
> > > +void<br>
> > > +isl_genX(emit_depth_stencil_<wbr>hiz_s)(const struct isl_device *dev, void<br>
> > *batch,<br>
> > > + const struct<br>
> > isl_depth_stencil_hiz_emit_<wbr>info *restrict info)<br>
> > > +{<br>
> > > + struct GENX(3DSTATE_DEPTH_BUFFER) db = {<br>
> > > + GENX(3DSTATE_DEPTH_BUFFER_<wbr>header),<br>
> > > + };<br>
> > > +<br>
> > > + if (info->depth_surf) {<br>
> > > + db.SurfaceType = isl_to_gen_ds_surftype[info-><wbr>depth_surf->dim];<br>
> > > + db.SurfaceFormat = isl_surf_get_depth_format(dev,<br>
> > info->depth_surf);<br>
> > > + db.Width = info->depth_surf->logical_<wbr>level0_px.width - 1;<br>
> > > + db.Height = info->depth_surf->logical_<wbr>level0_px.height - 1;<br>
> > > + } else if (info->stencil_surf) {<br>
> > > + db.SurfaceType = isl_to_gen_ds_surftype[info-><wbr>stencil_surf->dim];<br>
> > > + db.SurfaceFormat = D32_FLOAT;<br>
> > > + db.Width = info->stencil_surf->logical_<wbr>level0_px.width - 1;<br>
> > > + db.Height = info->stencil_surf->logical_<wbr>level0_px.height - 1;<br>
> > > + } else {<br>
> > > + db.SurfaceType = SURFTYPE_2D;<br>
> > > + db.SurfaceFormat = D32_FLOAT;<br>
> > > + db.Width = MAX2(info->fb_extent.width, 1) - 1;<br>
> > > + db.Height = MAX2(info->fb_extent.height, 1) - 1;<br>
> > > + }<br>
> > > +<br>
> > > + if (info->depth_surf || info->stencil_surf) {<br>
> > > + /* These are based entirely on the view */<br>
> > > + db.Depth = db.RenderTargetViewExtent = info->view->array_len - 1;<br>
> > > + db.LOD = info->view->base_level;<br>
> > > + db.MinimumArrayElement = info->view->base_array_layer;<br>
> > > + }<br>
> > > +<br>
> > > + if (info->depth_surf) {<br>
> > > +#if GEN_GEN >= 7<br>
> > > + db.DepthWriteEnable = true;<br>
> > > +#endif<br>
> > > + db.SurfaceBaseAddress = info->depth_address;<br>
> > > +#if GEN_GEN >= 6<br>
> > > + db.DepthBufferMOCS = info->mocs;<br>
> > > +#endif<br>
> > > + db.SurfacePitch = info->depth_surf->row_pitch - 1;<br>
> > > +#if GEN_GEN >= 8<br>
> > > + db.SurfaceQPitch =<br>
> > > + isl_surf_get_array_pitch_el_<wbr>rows(info->depth_surf) >> 2;<br>
> > > +#endif<br>
> > > + }<br>
> > > +<br>
> > > +#if GEN_GEN >= 6<br>
> > > + struct GENX(3DSTATE_STENCIL_BUFFER) sb = {<br>
> > > + GENX(3DSTATE_STENCIL_BUFFER_<wbr>header),<br>
> > > + };<br>
> > > +#else<br>
> > > +# define sb db<br>
> > > +#endif<br>
> > > +<br>
> > > + if (info->stencil_surf) {<br>
> > > +#if GEN_GEN >= 7<br>
> > > + db.StencilWriteEnable = true;<br>
> > > +#endif<br>
> > > +#if GEN_GEN >= 8 || GEN_IS_HASWELL<br>
> > > + sb.StencilBufferEnable = true;<br>
> > > +#endif<br>
> > > + sb.SurfaceBaseAddress = info->stencil_address;<br>
> ><br>
> > Shouldn't this check for depth not existing on gen < 6? Drop the "define<br>
> > sb db"<br>
> > above and:<br>
> ><br>
> > #if GEN_GEN >= 7<br>
> > sb.SurfaceBaseAddress = info->stencil_address;<br>
> > #else<br>
> > if (!info->depth_surf)<br>
> > db.SurfaceBaseAddress = info->stencil_address;<br>
> > #endif<br>
> ><br>
> > Same for SurfacePitch further down?<br>
> ><br>
> > Or are depth_surf and stencil_surf mutually exclusive on gen < 6? if so,<br>
> > perhaps add an assert?<br>
> ><br>
><br>
> My intention was that if you provide both a depth and a stencil surface on<br>
> gen6, they must point to the same isl_surf and their addresses must be the<br>
> same. There are asserts for this in isl_emit_depth_stencil_hiz_s above but<br>
> those are a long way away from this code. Maybe that was an ill-conceived<br>
> notion? I'm happy to change the semantics to something else if it's more<br>
> convenient.<br>
<br>
</div></div>I wasn't concerned about gen6, it has 3DSTATE_STENCIL_BUFFER and therefore<br>
one doesn't try to overwrite depth. My concern was gen4 and gen5. Do they<br>
actually ever have valid stencil_surf?</blockquote><div><br>I don't know, do they? You're the one writing the gen4 code to use ISL. :-)<br> </div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex"> If there is stencil only, it is still<br>
carried in depth_surf, right?<br>
If that holds then we should be able to simply guard the entire<br>
"if (info->stencil_surf)" behind "#if GEN_GEN >= 6"?<br></blockquote><div><br></div><div>I don't really have an opinion on how we handle it and I think it needs to be guided by the work you're doing more than anything else. If you'd like to just use depth_surf even when it's stencil-only, I'm totally fine with that. Whatever makes your life the easiest.<br><br></div><div>--Jason<br></div></div></div></div>