<div dir="auto">Reviewed-by: Marek Olšák <<a href="mailto:marek.olsak@amd.com">marek.olsak@amd.com</a>><div dir="auto"><br></div><div dir="auto">Marek</div></div><div class="gmail_extra"><br><div class="gmail_quote">On May 8, 2017 5:39 PM, "Nicolai Hähnle" <<a href="mailto:nhaehnle@gmail.com">nhaehnle@gmail.com</a>> wrote:<br type="attribution"><blockquote class="quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">From: Nicolai Hähnle <<a href="mailto:nicolai.haehnle@amd.com">nicolai.haehnle@amd.com</a>><br>
<br>
---<br>
src/gallium/drivers/radeonsi/<wbr>si_debug.c | 10 ++++++++++<br>
1 file changed, 10 insertions(+)<br>
<br>
diff --git a/src/gallium/drivers/<wbr>radeonsi/si_debug.c b/src/gallium/drivers/<wbr>radeonsi/si_debug.c<br>
index d39b303..d08a8fc 100644<br>
--- a/src/gallium/drivers/<wbr>radeonsi/si_debug.c<br>
+++ b/src/gallium/drivers/<wbr>radeonsi/si_debug.c<br>
@@ -490,20 +490,29 @@ static void si_dump_descriptors(struct si_context *sctx,<br>
static void si_dump_gfx_descriptors(struct si_context *sctx,<br>
const struct si_shader_ctx_state *state,<br>
FILE *f)<br>
{<br>
if (!state->cso || !state->current)<br>
return;<br>
<br>
si_dump_descriptors(sctx, state->cso->type, &state->cso->info, f);<br>
}<br>
<br>
+static void si_dump_compute_descriptors(<wbr>struct si_context *sctx, FILE *f)<br>
+{<br>
+ if (!sctx->cs_shader_state.<wbr>program ||<br>
+ sctx->cs_shader_state.program != sctx->cs_shader_state.emitted_<wbr>program)<br>
+ return;<br>
+<br>
+ si_dump_descriptors(sctx, PIPE_SHADER_COMPUTE, NULL, f);<br>
+}<br>
+<br>
struct si_shader_inst {<br>
char text[160]; /* one disasm line */<br>
unsigned offset; /* instruction offset */<br>
unsigned size; /* instruction size = 4 or 8 */<br>
};<br>
<br>
/* Split a disassembly string into lines and add them to the array pointed<br>
* to by "instructions". */<br>
static void si_add_split_disasm(const char *disasm,<br>
uint64_t start_addr,<br>
@@ -793,20 +802,21 @@ static void si_dump_debug_state(struct pipe_context *ctx, FILE *f,<br>
si_dump_command("Wave information", "umr -O bits -wa", f);<br>
}<br>
<br>
si_dump_descriptor_list(&sctx-<wbr>>descriptors[SI_DESCS_RW_<wbr>BUFFERS],<br>
"", "RW buffers", SI_NUM_RW_BUFFERS, f);<br>
si_dump_gfx_descriptors(sctx, &sctx->vs_shader, f);<br>
si_dump_gfx_descriptors(sctx, &sctx->tcs_shader, f);<br>
si_dump_gfx_descriptors(sctx, &sctx->tes_shader, f);<br>
si_dump_gfx_descriptors(sctx, &sctx->gs_shader, f);<br>
si_dump_gfx_descriptors(sctx, &sctx->ps_shader, f);<br>
+ si_dump_compute_descriptors(<wbr>sctx, f);<br>
}<br>
<br>
if (flags & PIPE_DUMP_LAST_COMMAND_BUFFER) {<br>
si_dump_bo_list(sctx, &sctx->last_gfx, f);<br>
si_dump_last_ib(sctx, f);<br>
<br>
fprintf(f, "Done.\n");<br>
<br>
/* dump only once */<br>
radeon_clear_saved_cs(&sctx-><wbr>last_gfx);<br>
<font color="#888888">--<br>
2.9.3<br>
<br>
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</font></blockquote></div><br></div>