<div dir="ltr"><div class="gmail_extra"><div class="gmail_quote">On Fri, May 19, 2017 at 2:38 AM, Daniel Stone <span dir="ltr"><<a href="mailto:daniels@collabora.com" target="_blank">daniels@collabora.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">From: Ben Widawsky <<a href="mailto:ben@bwidawsk.net">ben@bwidawsk.net</a>><br>
<br>
Make the code only disable CCS when it has to, unlike before where it<br>
disabled CCS and enabled it when it could. This is much more inline with<br>
how it should work in a few patches, where we have fewer restrictions as<br>
to when we disable CCS.<br>
<br>
v2: Change CCS disabling to an assertion in layout creation (Topi)<br>
<br>
v3: Make sure to disable aux buffers when creating a miptree from a BO.<br>
Today, this only happens via intel_update_image_buffer. At the end of<br>
the modifier series, we should be able to undo this. Some fixes from<br>
Topi in here as well.<br>
<br>
Cc: "Pohjolainen, Topi" <<a href="mailto:topi.pohjolainen@gmail.com">topi.pohjolainen@gmail.com</a>><br>
Signed-off-by: Ben Widawsky <<a href="mailto:ben@bwidawsk.net">ben@bwidawsk.net</a>><br>
<br>
Topi's changes<br>
<br>
Signed-off-by: Daniel Stone <<a href="mailto:daniels@collabora.com">daniels@collabora.com</a>><br>
---<br>
src/mesa/drivers/dri/i965/brw_<wbr>context.c | 3 +++<br>
src/mesa/drivers/dri/i965/<wbr>intel_fbo.h | 7 +++++++<br>
src/mesa/drivers/dri/i965/<wbr>intel_mipmap_tree.c | 22 +++++++++++++---------<br>
3 files changed, 23 insertions(+), 9 deletions(-)<br>
<br>
diff --git a/src/mesa/drivers/dri/i965/<wbr>brw_context.c b/src/mesa/drivers/dri/i965/<wbr>brw_context.c<br>
index 5055dd76a8..1a2b64f73e 100644<br>
--- a/src/mesa/drivers/dri/i965/<wbr>brw_context.c<br>
+++ b/src/mesa/drivers/dri/i965/<wbr>brw_context.c<br>
@@ -1718,6 +1718,9 @@ intel_update_image_buffer(<wbr>struct brw_context *intel,<br>
if (last_mt && last_mt->bo == buffer->bo)<br>
return;<br>
<br>
+ if (!buffer->aux_offset)<br>
+ rb->no_aux = true;<br>
+<br>
intel_update_winsys_<wbr>renderbuffer_miptree(intel, rb, buffer->bo,<br>
buffer->width, buffer->height,<br>
buffer->pitch);<br>
diff --git a/src/mesa/drivers/dri/i965/<wbr>intel_fbo.h b/src/mesa/drivers/dri/i965/<wbr>intel_fbo.h<br>
index 08b82e8934..9265aab2e2 100644<br>
--- a/src/mesa/drivers/dri/i965/<wbr>intel_fbo.h<br>
+++ b/src/mesa/drivers/dri/i965/<wbr>intel_fbo.h<br>
@@ -111,6 +111,13 @@ struct intel_renderbuffer<br>
* for the duration of a mapping.<br>
*/<br>
bool singlesample_mt_is_tmp;<br>
+<br>
+ /**<br>
+ * Set to true if this buffer definitely does not have auxiliary data, like<br>
+ * CCS, associated with it. It's generally to be used when importing a<br>
+ * DRIimage, where that DRIimage had no modifier.<br>
+ */<br>
+ bool no_aux;<br></blockquote><div><br></div><div>I think I would mildly prefer the stuff having to do with this bool to be its own patch right after this one.<br></div><div> </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
};<br>
<br>
<br>
diff --git a/src/mesa/drivers/dri/i965/<wbr>intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/<wbr>intel_mipmap_tree.c<br>
index a8564d9573..9dca5cc435 100644<br>
--- a/src/mesa/drivers/dri/i965/<wbr>intel_mipmap_tree.c<br>
+++ b/src/mesa/drivers/dri/i965/<wbr>intel_mipmap_tree.c<br>
@@ -328,7 +328,6 @@ intel_miptree_create_layout(<wbr>struct brw_context *brw,<br>
mt->logical_depth0 = depth0;<br>
mt->aux_disable = (layout_flags & MIPTREE_LAYOUT_DISABLE_AUX) != 0 ?<br>
INTEL_AUX_DISABLE_ALL : INTEL_AUX_DISABLE_NONE;<br>
- mt->aux_disable |= INTEL_AUX_DISABLE_CCS;<br>
mt->is_scanout = (layout_flags & MIPTREE_LAYOUT_FOR_SCANOUT) != 0;<br>
exec_list_make_empty(&mt->hiz_<wbr>map);<br>
exec_list_make_empty(&mt-><wbr>color_resolve_map);<br>
@@ -521,6 +520,8 @@ intel_miptree_create_layout(<wbr>struct brw_context *brw,<br>
} else if (brw->gen >= 9 && num_samples > 1) {<br>
layout_flags |= MIPTREE_LAYOUT_FORCE_HALIGN16;<br>
} else {<br>
+ mt->aux_disable |= INTEL_AUX_DISABLE_CCS;<br>
+<br>
const UNUSED bool is_lossless_compressed_aux =<br>
brw->gen >= 9 && num_samples == 1 &&<br>
mt->format == MESA_FORMAT_R_UINT32;<br>
@@ -696,7 +697,6 @@ intel_miptree_create(struct brw_context *brw,<br>
*/<br>
if (intel_tiling_supports_non_<wbr>msrt_mcs(brw, mt->tiling) &&<br>
intel_miptree_supports_non_<wbr>msrt_fast_clear(brw, mt)) {<br>
- mt->aux_disable &= ~INTEL_AUX_DISABLE_CCS;<br>
assert(brw->gen < 8 || mt->halign == 16 || num_samples <= 1);<br>
<br>
/* On Gen9+ clients are not currently capable of consuming compressed<br>
@@ -710,8 +710,11 @@ intel_miptree_create(struct brw_context *brw,<br>
intel_miptree_supports_<wbr>lossless_compressed(brw, mt);<br>
<br>
if (is_lossless_compressed) {<br>
+ assert((mt->aux_disable & INTEL_AUX_DISABLE_CCS) == 0);<br></blockquote><div><br></div><div>Mind making this assert(!(thing)) rather than assert((thing) == 0)? That would match the one a few lines below.<br></div><div> </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
intel_miptree_alloc_non_msrt_<wbr>mcs(brw, mt, is_lossless_compressed);<br>
}<br>
+ } else {<br>
+ mt->aux_disable |= INTEL_AUX_DISABLE_CCS;<br>
}<br>
<br>
return mt;<br>
@@ -803,7 +806,7 @@ create_ccs_buf_for_image(<wbr>struct brw_context *intel,<br>
mt->mcs_buf->qpitch = isl_surf_get_array_pitch_sa_<wbr>rows(&temp_ccs_surf);<br>
<br>
intel_miptree_init_mcs(intel, mt, 0);<br>
- mt->aux_disable &= ~INTEL_AUX_DISABLE_CCS;<br>
+ assert(!(mt->aux_disable & INTEL_AUX_DISABLE_CCS));<br>
mt->msaa_layout = INTEL_MSAA_LAYOUT_CMS;<br>
<br>
return true;<br>
@@ -894,18 +897,19 @@ intel_update_winsys_<wbr>renderbuffer_miptree(struct brw_context *intel,<br>
height,<br>
1,<br>
pitch,<br>
- MIPTREE_LAYOUT_FOR_SCANOUT);<br>
+ MIPTREE_LAYOUT_FOR_SCANOUT |<br>
+ irb->no_aux ? MIPTREE_LAYOUT_DISABLE_AUX: 0);<br>
if (!singlesample_mt)<br>
goto fail;<br>
<br>
- /* If this miptree is capable of supporting fast color clears, set<br>
- * mcs_state appropriately to ensure that fast clears will occur.<br>
+ /* If this miptree is not capable of supporting fast color clears, flag<br>
+ * mcs allocation disabled.<br>
* Allocation of the MCS miptree will be deferred until the first fast<br>
* clear actually occurs.<br>
*/<br>
- if (intel_tiling_supports_non_<wbr>msrt_mcs(intel, singlesample_mt->tiling) &&<br>
- intel_miptree_supports_non_<wbr>msrt_fast_clear(intel, singlesample_mt)) {<br>
- singlesample_mt->aux_disable &= ~INTEL_AUX_DISABLE_CCS;<br>
+ if (!intel_tiling_supports_non_<wbr>msrt_mcs(intel, singlesample_mt->tiling) ||<br>
+ !intel_miptree_supports_non_<wbr>msrt_fast_clear(intel, singlesample_mt)) {<br>
+ singlesample_mt->aux_disable |= INTEL_AUX_DISABLE_CCS;<br>
}<br>
<br>
if (num_samples == 0) {<br>
<span class="HOEnZb"><font color="#888888">--<br>
2.13.0<br>
<br>
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