<div dir="ltr"><div class="gmail_extra"><div class="gmail_quote">On Thu, Jun 1, 2017 at 9:41 AM, Anuj Phogat <span dir="ltr"><<a href="mailto:anuj.phogat@gmail.com" target="_blank">anuj.phogat@gmail.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><span class="">On Tue, May 23, 2017 at 2:35 PM, Anuj Phogat <<a href="mailto:anuj.phogat@gmail.com">anuj.phogat@gmail.com</a>> wrote:<br>
> This patch makes non functional changes. Renaming is just to<br>
> make the code more readable.<br>
><br>
> V2: update the types to "enum isl_format"<br>
</span>Jason, do you have any other questions ? r-b ?<br></blockquote><div><br></div><div>Patch 1/6 of the series Chad sent out yesterday also does this and a bit more. I don't think he saw yours.<br></div><div> </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
<div class="HOEnZb"><div class="h5">><br>
> Signed-off-by: Anuj Phogat <<a href="mailto:anuj.phogat@gmail.com">anuj.phogat@gmail.com</a>><br>
> Cc: Jason Ekstrand <<a href="mailto:jason@jlekstrand.net">jason@jlekstrand.net</a>><br>
> ---<br>
> src/mesa/drivers/dri/i965/brw_<wbr>context.c | 5 +++--<br>
> src/mesa/drivers/dri/i965/brw_<wbr>wm_surface_state.c | 6 +++---<br>
> src/mesa/drivers/dri/i965/<wbr>intel_mipmap_tree.c | 5 +++--<br>
> 3 files changed, 9 insertions(+), 7 deletions(-)<br>
><br>
> diff --git a/src/mesa/drivers/dri/i965/<wbr>brw_context.c b/src/mesa/drivers/dri/i965/<wbr>brw_context.c<br>
> index d3ed871..cb6a76a 100644<br>
> --- a/src/mesa/drivers/dri/i965/<wbr>brw_context.c<br>
> +++ b/src/mesa/drivers/dri/i965/<wbr>brw_context.c<br>
> @@ -205,9 +205,10 @@ intel_texture_view_requires_<wbr>resolve(struct brw_context *brw,<br>
> !intel_miptree_is_lossless_<wbr>compressed(brw, intel_tex->mt))<br>
> return false;<br>
><br>
> - const uint32_t brw_format = brw_isl_format_for_mesa_<wbr>format(intel_tex->_Format);<br>
> + const enum isl_format isl_format =<br>
> + brw_isl_format_for_mesa_<wbr>format(intel_tex->_Format);<br>
><br>
> - if (isl_format_supports_ccs_e(&<wbr>brw->screen->devinfo, brw_format))<br>
> + if (isl_format_supports_ccs_e(&<wbr>brw->screen->devinfo, isl_format))<br>
> return false;<br>
><br>
> perf_debug("Incompatible sampling format (%s) for rbc (%s)\n",<br>
> diff --git a/src/mesa/drivers/dri/i965/<wbr>brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/<wbr>brw_wm_surface_state.c<br>
> index a0fed60..05e41dc 100644<br>
> --- a/src/mesa/drivers/dri/i965/<wbr>brw_wm_surface_state.c<br>
> +++ b/src/mesa/drivers/dri/i965/<wbr>brw_wm_surface_state.c<br>
> @@ -686,7 +686,7 @@ brw_update_buffer_texture_<wbr>surface(struct gl_context *ctx,<br>
> uint32_t size = tObj->BufferSize;<br>
> struct brw_bo *bo = NULL;<br>
> mesa_format format = tObj->_BufferObjectFormat;<br>
> - uint32_t brw_format = brw_isl_format_for_mesa_<wbr>format(format);<br>
> + const enum isl_format isl_format = brw_isl_format_for_mesa_<wbr>format(format);<br>
> int texel_size = _mesa_get_format_bytes(format)<wbr>;<br>
><br>
> if (intel_obj) {<br>
> @@ -712,14 +712,14 @@ brw_update_buffer_texture_<wbr>surface(struct gl_context *ctx,<br>
> */<br>
> size = MIN2(size, ctx->Const.<wbr>MaxTextureBufferSize * (unsigned) texel_size);<br>
><br>
> - if (brw_format == 0 && format != MESA_FORMAT_RGBA_FLOAT32) {<br>
> + if (isl_format == 0 && format != MESA_FORMAT_RGBA_FLOAT32) {<br>
> _mesa_problem(NULL, "bad format %s for texture buffer\n",<br>
> _mesa_get_format_name(format))<wbr>;<br>
> }<br>
><br>
> brw_emit_buffer_surface_state(<wbr>brw, surf_offset, bo,<br>
> tObj->BufferOffset,<br>
> - brw_format,<br>
> + isl_format,<br>
> size,<br>
> texel_size,<br>
> false /* rw */);<br>
> diff --git a/src/mesa/drivers/dri/i965/<wbr>intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/<wbr>intel_mipmap_tree.c<br>
> index db0a397..a92e3cb 100644<br>
> --- a/src/mesa/drivers/dri/i965/<wbr>intel_mipmap_tree.c<br>
> +++ b/src/mesa/drivers/dri/i965/<wbr>intel_mipmap_tree.c<br>
> @@ -209,8 +209,9 @@ intel_miptree_supports_non_<wbr>msrt_fast_clear(struct brw_context *brw,<br>
><br>
> if (brw->gen >= 9) {<br>
> mesa_format linear_format = _mesa_get_srgb_format_linear(<wbr>mt->format);<br>
> - const uint32_t brw_format = brw_isl_format_for_mesa_<wbr>format(linear_format);<br>
> - return isl_format_supports_ccs_e(&<wbr>brw->screen->devinfo, brw_format);<br>
> + const enum isl_format isl_format =<br>
> + brw_isl_format_for_mesa_<wbr>format(linear_format);<br>
> + return isl_format_supports_ccs_e(&<wbr>brw->screen->devinfo, isl_format);<br>
> } else<br>
> return true;<br>
> }<br>
> --<br>
> 2.9.3<br>
><br>
</div></div></blockquote></div><br></div></div>