<div dir="ltr">If you can manage to get me a backtrace (bt full preferably), that would be fantastic! <div><div class="gmail_extra"> <div class="gmail_quote">On Thu, Jun 8, 2017 at 4:34 AM, Tapani Pälli <<a href="mailto:tapani.palli@intel.com" target="_blank">tapani.palli@intel.com</a>> wrote: <blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">FYI I bisected that starting from this commit (or maybe somewhere within this series) there are segfaults with systemui (using libhwui) in Android, it looks like below. Seems rather hard case to debug as it does not seem to always happen (!) but will try to figure out what is going wrong. ---- 8< ---- 01-01 00:00:43.607 2926 2959 F libc : Fatal signal 11 (SIGSEGV), code 1, fault addr 0x0 in tid 2959 (RenderThread) 01-01 00:00:43.608 1532 1532 W : debuggerd: handling request: pid=2926 uid=10013 gid=10013 tid=2959 01-01 00:00:43.667 2975 2975 F DEBUG : *** *** *** *** *** *** *** *** *** *** *** *** *** *** *** *** 01-01 00:00:43.667 2975 2975 F DEBUG : Build fingerprint: 'AndroidIA/androidia_64/androidia_64:7.1.1/NMF26Q/tpalli06060923:eng/test-keys' 01-01 00:00:43.667 2975 2975 F DEBUG : Revision: '0' 01-01 00:00:43.667 2975 2975 F DEBUG : ABI: 'x86_64' 01-01 00:00:43.667 2975 2975 F DEBUG : pid: 2926, tid: 2959, name: RenderThread >>> com.android.systemui <<< 01-01 00:00:43.667 2975 2975 F DEBUG : signal 11 (SIGSEGV), code 1 (SEGV_MAPERR), fault addr 0x0 01-01 00:00:43.667 2975 2975 F DEBUG : rax 000070332c1ae400 rbx 000070332c13a070 rcx 0000000000000001 rdx 0000703329a27320 01-01 00:00:43.667 2975 2975 F DEBUG : rsi 0000000000000000 rdi 0000000000000000 01-01 00:00:43.667 2975 2975 F DEBUG : r8 0000000000000000 r9 00000000ffffffff r10 0000703349b2ab50 r11 0000000000000246 01-01 00:00:43.667 2975 2975 F DEBUG : r12 0000000000000000 r13 000070332d86ab1f r14 000070332c15f0d8 r15 0000000000000001 01-01 00:00:43.667 2975 2975 F DEBUG : cs 0000000000000033 ss 000000000000002b 01-01 00:00:43.667 2975 2975 F DEBUG : rip 000070332c32416f rbp 000070332c1fb800 rsp 000070332d86ab10 eflags 0000000000010246 01-01 00:00:43.673 2975 2975 F DEBUG : 01-01 00:00:43.673 2975 2975 F DEBUG : backtrace: 01-01 00:00:43.673 2975 2975 F DEBUG : #00 pc 000000000006616f /system/lib64/dri/i965_dri.so (intel_update_state+463) 01-01 00:00:43.673 2975 2975 F DEBUG : #01 pc 000000000031e753 /system/lib64/dri/i965_dri.so (_mesa_update_state_locked+1555) 01-01 00:00:43.673 2975 2975 F DEBUG : #02 pc 000000000031e790 /system/lib64/dri/i965_dri.so (_mesa_update_state+16) 01-01 00:00:43.673 2975 2975 F DEBUG : #03 pc 000000000024577b /system/lib64/dri/i965_dri.so (_mesa_Clear+171)<div class="HOEnZb"><div class="h5"> On 05/27/2017 02:30 AM, Jason Ekstrand wrote: <blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"> --- src/mesa/drivers/dri/i965/brw_context.c | 9 +-------- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 9 +++++++++ src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 3 +++ 3 files changed, 13 insertions(+), 8 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c index 671af42..ed57012 100644 --- a/src/mesa/drivers/dri/i965/brw_context.c +++ b/src/mesa/drivers/dri/i965/brw_context.c @@ -253,14 +253,7 @@ intel_update_state(struct gl_context * ctx, GLuint new_state) tex_obj = intel_texture_object(u->TexObj); if (tex_obj && tex_obj->mt) { - /* Access to images is implemented using indirect messages - * against data port. Normal render target write understands - * lossless compression but unfortunately the typed/untyped - * read/write interface doesn't. Therefore even lossless - * compressed surfaces need to be resolved prior to accessing - * them. Hence skip setting INTEL_MIPTREE_IGNORE_CCS_E. - */ - intel_miptree_all_slices_resolve_color(brw, tex_obj->mt, 0); + intel_miptree_prepare_image(brw, tex_obj->mt); if (intel_miptree_is_lossless_compressed(brw, tex_obj->mt) && intel_disable_rb_aux_buffer(brw, tex_obj->mt->bo)) { diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index 76fe8b8..5739508 100644 --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c @@ -2439,6 +2439,15 @@ intel_miptree_prepare_texture(struct brw_context *brw, } void +intel_miptree_prepare_image(struct brw_context *brw, + struct intel_mipmap_tree *mt) +{ + /* The data port doesn't understand any compression */ + intel_miptree_prepare_access(brw, mt, 0, INTEL_REMAINING_LEVELS, + 0, INTEL_REMAINING_LAYERS, false, false); +} + +void intel_miptree_prepare_fb_fetch(struct brw_context *brw, struct intel_mipmap_tree *mt, uint32_t level, uint32_t start_layer, uint32_t num_layers) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h index 9ab9039..2136eff 100644 --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h @@ -1016,6 +1016,9 @@ intel_miptree_prepare_texture(struct brw_context *brw, mesa_format view_format, bool *aux_supported_out); void +intel_miptree_prepare_image(struct brw_context *brw, + struct intel_mipmap_tree *mt); +void intel_miptree_prepare_fb_fetch(struct brw_context *brw, struct intel_mipmap_tree *mt, uint32_t level, uint32_t start_layer, uint32_t num_layers); </blockquote> </div></div></blockquote></div> </div></div></div>