<div dir="ltr"><div>Series is<br><br></div>Reviewed-by: Jason Ekstrand <<a href="mailto:jason@jlekstrand.net">jason@jlekstrand.net</a>><br></div><div class="gmail_extra"><br><div class="gmail_quote">On Mon, May 22, 2017 at 12:12 PM, Topi Pohjolainen <span dir="ltr"><<a href="mailto:topi.pohjolainen@gmail.com" target="_blank">topi.pohjolainen@gmail.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div class="HOEnZb"><div class="h5">CC: Kenneth Graunke <<a href="mailto:kenneth@whitecape.org">kenneth@whitecape.org</a>><br>
Signed-off-by: Topi Pohjolainen <<a href="mailto:topi.pohjolainen@intel.com">topi.pohjolainen@intel.com</a>><br>
---<br>
 src/mesa/drivers/dri/i965/brw_<wbr>misc_state.c | 7 +++++++<br>
 1 file changed, 7 insertions(+)<br>
<br>
diff --git a/src/mesa/drivers/dri/i965/<wbr>brw_misc_state.c b/src/mesa/drivers/dri/i965/<wbr>brw_misc_state.c<br>
index 85050ce..fe021b0 100644<br>
--- a/src/mesa/drivers/dri/i965/<wbr>brw_misc_state.c<br>
+++ b/src/mesa/drivers/dri/i965/<wbr>brw_misc_state.c<br>
@@ -165,6 +165,13 @@ rebase_depth_stencil(struct brw_context *brw, struct intel_renderbuffer *irb,<br>
       perf_debug("HW workaround: blitting depth level %d to a temporary "<br>
                  "to fix alignment (depth tile offset %d,%d)\n",<br>
                  irb->mt_level, tile_x, tile_y);<br>
+<br>
+      /* Create new miptree representing single "irb->mt_level" only and<br>
+       * make renderbuffer point this instead of the full miptree. Note that<br>
+       * the underlying texture object still carries reference to the original<br>
+       * full mipmap tree and intel_finalize_mipmap_tree() will eventually<br>
+       * merge these two.<br>
+       */<br>
       intel_renderbuffer_move_to_<wbr>temp(brw, irb, invalidate);<br>
<br>
       /* Get the new offset. */<br>
--<br>
2.9.3<br>
<br>
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</div></div></blockquote></div><br></div>