<div dir="ltr"><div class="gmail_extra"><div class="gmail_quote">On Thu, Jul 20, 2017 at 3:00 AM, Pohjolainen, Topi <span dir="ltr"><<a href="mailto:topi.pohjolainen@gmail.com" target="_blank">topi.pohjolainen@gmail.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div class="HOEnZb"><div class="h5">On Wed, Jul 19, 2017 at 02:01:35PM -0700, Jason Ekstrand wrote:<br>
> ---<br>
> src/mesa/drivers/dri/i965/brw_<wbr>blorp.c | 24 ++++++++++++++++<br>
> src/mesa/drivers/dri/i965/brw_<wbr>blorp.h | 5 ++++<br>
> src/mesa/drivers/dri/i965/<wbr>intel_mipmap_tree.c | 40 +++++++++++++++++++++++++--<br>
> 3 files changed, 67 insertions(+), 2 deletions(-)<br>
><br>
> diff --git a/src/mesa/drivers/dri/i965/<wbr>brw_blorp.c b/src/mesa/drivers/dri/i965/<wbr>brw_blorp.c<br>
> index efa3b39..ac47f31 100644<br>
> --- a/src/mesa/drivers/dri/i965/<wbr>brw_blorp.c<br>
> +++ b/src/mesa/drivers/dri/i965/<wbr>brw_blorp.c<br>
> @@ -1042,6 +1042,30 @@ brw_blorp_resolve_color(struct brw_context *brw, struct intel_mipmap_tree *mt,<br>
> brw_emit_end_of_pipe_sync(brw, PIPE_CONTROL_RENDER_TARGET_<wbr>FLUSH);<br>
> }<br>
><br>
> +void<br>
> +brw_blorp_mcs_partial_<wbr>resolve(struct brw_context *brw,<br>
> + struct intel_mipmap_tree *mt,<br>
> + uint32_t start_layer, uint32_t num_layers)<br>
> +{<br>
> + DBG("%s to mt %p layers %u-%u\n", __FUNCTION__, mt,<br>
> + start_layer, start_layer + num_layers - 1);<br>
> +<br>
> + const mesa_format format = _mesa_get_srgb_format_linear(<wbr>mt->format);<br>
> + enum isl_format isl_format = brw_blorp_to_isl_format(brw, format, true);<br>
> +<br>
> + struct isl_surf isl_tmp[1];<br>
> + struct blorp_surf surf;<br>
> + uint32_t level = 0;<br>
> + blorp_surf_for_miptree(brw, &surf, mt, true, false, 0,<br>
> + &level, start_layer, num_layers, isl_tmp);<br>
> +<br>
> + struct blorp_batch batch;<br>
> + blorp_batch_init(&brw->blorp, &batch, brw, 0);<br>
> + blorp_mcs_partial_resolve(&<wbr>batch, &surf, isl_format,<br>
> + start_layer, num_layers);<br>
> + blorp_batch_finish(&batch);<br>
> +}<br>
> +<br>
> /**<br>
> * Perform a HiZ or depth resolve operation.<br>
> *<br>
> diff --git a/src/mesa/drivers/dri/i965/<wbr>brw_blorp.h b/src/mesa/drivers/dri/i965/<wbr>brw_blorp.h<br>
> index 29d5788..c65a68a 100644<br>
> --- a/src/mesa/drivers/dri/i965/<wbr>brw_blorp.h<br>
> +++ b/src/mesa/drivers/dri/i965/<wbr>brw_blorp.h<br>
> @@ -74,6 +74,11 @@ brw_blorp_resolve_color(struct brw_context *brw,<br>
> enum blorp_fast_clear_op resolve_op);<br>
><br>
> void<br>
> +brw_blorp_mcs_partial_<wbr>resolve(struct brw_context *brw,<br>
> + struct intel_mipmap_tree *mt,<br>
> + uint32_t start_layer, uint32_t num_layers);<br>
> +<br>
> +void<br>
> intel_hiz_exec(struct brw_context *brw, struct intel_mipmap_tree *mt,<br>
> unsigned int level, unsigned int start_layer,<br>
> unsigned int num_layers, enum blorp_hiz_op op);<br>
> diff --git a/src/mesa/drivers/dri/i965/<wbr>intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/<wbr>intel_mipmap_tree.c<br>
> index 2521190..1fd39a1 100644<br>
> --- a/src/mesa/drivers/dri/i965/<wbr>intel_mipmap_tree.c<br>
> +++ b/src/mesa/drivers/dri/i965/<wbr>intel_mipmap_tree.c<br>
> @@ -2323,6 +2323,35 @@ intel_miptree_finish_ccs_<wbr>write(struct brw_context *brw,<br>
> }<br>
><br>
> static void<br>
> +intel_miptree_prepare_mcs_<wbr>access(struct brw_context *brw,<br>
> + struct intel_mipmap_tree *mt,<br>
> + uint32_t layer,<br>
> + bool mcs_supported,<br>
> + bool fast_clear_supported)<br>
> +{<br>
> + switch (intel_miptree_get_aux_state(<wbr>mt, 0, layer)) {<br>
> + case ISL_AUX_STATE_CLEAR:<br>
> + case ISL_AUX_STATE_COMPRESSED_<wbr>CLEAR:<br>
> + assert(mcs_supported);<br>
> + if (!fast_clear_supported) {<br>
> + brw_blorp_mcs_partial_resolve(<wbr>brw, mt, layer, 1);<br>
> + intel_miptree_set_aux_state(<wbr>brw, mt, 0, layer, 1,<br>
> + ISL_AUX_STATE_COMPRESSED_NO_<wbr>CLEAR);<br>
> + }<br>
> + break;<br>
> +<br>
> + case ISL_AUX_STATE_COMPRESSED_NO_<wbr>CLEAR:<br>
> + assert(mcs_supported);<br>
> + break; /* Nothing to do */<br>
> +<br>
> + case ISL_AUX_STATE_RESOLVED:<br>
> + case ISL_AUX_STATE_PASS_THROUGH:<br>
> + case ISL_AUX_STATE_AUX_INVALID:<br>
> + unreachable("Invalid aux state for MCS");<br>
> + }<br>
> +}<br>
> +<br>
> +static void<br>
> intel_miptree_finish_mcs_<wbr>write(struct brw_context *brw,<br>
> struct intel_mipmap_tree *mt,<br>
> uint32_t layer,<br>
> @@ -2336,10 +2365,10 @@ intel_miptree_finish_mcs_<wbr>write(struct brw_context *brw,<br>
> break;<br>
><br>
> case ISL_AUX_STATE_COMPRESSED_<wbr>CLEAR:<br>
> + case ISL_AUX_STATE_COMPRESSED_NO_<wbr>CLEAR:<br>
> assert(written_with_mcs);<br>
> break; /* Nothing to do */<br>
><br>
> - case ISL_AUX_STATE_COMPRESSED_NO_<wbr>CLEAR:<br>
> case ISL_AUX_STATE_RESOLVED:<br>
> case ISL_AUX_STATE_PASS_THROUGH:<br>
> case ISL_AUX_STATE_AUX_INVALID:<br>
> @@ -2499,7 +2528,14 @@ intel_miptree_prepare_access(<wbr>struct brw_context *brw,<br>
><br>
> if (mt->num_samples > 1) {<br>
> /* Nothing to do for MSAA */<br>
<br>
</div></div>We should drop this comment now, right?<span class=""><br></span></blockquote><div><br></div><div>Yup. Fixed locally.<br></div><div> </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><span class="">
> - assert(aux_supported && fast_clear_supported);<br>
> + assert(start_level == 0 && num_levels == 1);<br>
> + const uint32_t level_layers =<br>
> + miptree_layer_range_length(mt, 0, start_layer, num_layers);<br>
> + for (uint32_t a = 0; a < level_layers; a++) {<br>
> + intel_miptree_prepare_mcs_<wbr>access(brw, mt, start_layer + a,<br>
> + aux_supported,<br>
> + fast_clear_supported);<br>
> + }<br>
> } else {<br>
> for (uint32_t l = 0; l < num_levels; l++) {<br>
> const uint32_t level = start_level + l;<br>
> --<br>
> 2.5.0.400.gff86faf<br>
><br>
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</blockquote></div><br></div></div>