<div dir="ltr"><div class="gmail_extra"><div class="gmail_quote">On Thu, Jul 20, 2017 at 8:08 AM, Jason Ekstrand <span dir="ltr"><<a href="mailto:jason@jlekstrand.net" target="_blank">jason@jlekstrand.net</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><span class="">On July 20, 2017 2:27:50 AM "Pohjolainen, Topi" <<a href="mailto:topi.pohjolainen@gmail.com" target="_blank">topi.pohjolainen@gmail.com</a>> wrote:<br>
<br>
<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
<br>
This still leaves create_aux_state_map() using physical number of layers for<br>
the actual allocation. I toyed a little with this hoping to put it in front my<br>
i965-to-isl work. In the end it looks to me that moving away from physical<br>
is easier/cleaner once the conversion to isl is done. This prevents us from<br>
addressing both isl-based and native slice table-based leaving just the<br>
isl-based. Moreover in case of slice table-based we would need to calculate<br>
a layer-number divider as the slice table itself stores depth as physical.<br>
<br>
There are altogether 6 places calling get_num_phys_layers() in the end.<br>
I think these document nicely all the locations we need to consider. How does<br>
this sound?<br>
</blockquote>
<br></span>
That's fine with me.<br></blockquote><div><br></div><div>To put a finer point on it, I'm fine with your patch landing as-is (go ahead and add my R-B). However, I am going to have to switch it over to logical as part of my series since the MCS partial resolve code relies on it being logical.<br></div><div> </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
<div class="HOEnZb"><div class="h5"><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
On Wed, Jul 19, 2017 at 02:01:33PM -0700, Jason Ekstrand wrote:<br>
<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
---<br>
src/mesa/drivers/dri/i965/int<wbr>el_mipmap_tree.c | 14 ++++++++++----<br>
1 file changed, 10 insertions(+), 4 deletions(-)<br>
<br>
diff --git a/src/mesa/drivers/dri/i965/in<wbr>tel_mipmap_tree.c b/src/mesa/drivers/dri/i965/in<wbr>tel_mipmap_tree.c<br>
index 3eac077..8d8ea43 100644<br>
--- a/src/mesa/drivers/dri/i965/in<wbr>tel_mipmap_tree.c<br>
+++ b/src/mesa/drivers/dri/i965/in<wbr>tel_mipmap_tree.c<br>
@@ -2461,12 +2461,18 @@ miptree_layer_range_length(con<wbr>st struct intel_mipmap_tree *mt, uint32_t level,<br>
assert(level <= mt->last_level);<br>
uint32_t total_num_layers;<br>
<br>
- if (mt->surf.size > 0)<br>
+ if (mt->surf.size > 0) {<br>
total_num_layers = mt->surf.dim == ISL_SURF_DIM_3D ?<br>
- minify(mt->surf.phys_level0_s<wbr>a.depth, level) :<br>
- mt->surf.phys_level0_sa.<wbr>array_len;<br>
- else<br>
+ minify(mt->surf.logical_level<wbr>0_px.depth, level) :<br>
+ mt-><a href="http://surf.logical_level0_px.ar">surf.logical_level0_px.ar</a><wbr>ray_len;<br>
+ } else {<br>
total_num_layers = mt->level[level].depth;<br>
+ if (mt->msaa_layout == INTEL_MSAA_LAYOUT_UMS ||<br>
+ mt->msaa_layout == INTEL_MSAA_LAYOUT_CMS) {<br>
+ assert(total_num_layers % mt->num_samples == 0);<br>
+ total_num_layers /= mt->num_samples;<br>
+ }<br>
+ }<br>
<br>
assert(start_layer < total_num_layers);<br>
if (num_layers == INTEL_REMAINING_LAYERS)<br>
--<br>
2.5.0.400.gff86faf<br>
<br>
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</blockquote></blockquote>
<br>
<br>
</div></div></blockquote></div><br></div></div>