<div dir="ltr">s/Aling/Align/<br><div class="gmail_extra"><br><div class="gmail_quote">On Fri, Jul 21, 2017 at 8:00 AM, Topi Pohjolainen <span dir="ltr"><<a href="mailto:topi.pohjolainen@gmail.com" target="_blank">topi.pohjolainen@gmail.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">in order to support blit engine.<br>
<br>
Signed-off-by: Topi Pohjolainen <<a href="mailto:topi.pohjolainen@intel.com">topi.pohjolainen@intel.com</a>><br>
---<br>
src/intel/isl/isl.c | 16 +++++++++++++++-<br>
1 file changed, 15 insertions(+), 1 deletion(-)<br>
<br>
diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c<br>
index 4393088409..90a8be2c58 100644<br>
--- a/src/intel/isl/isl.c<br>
+++ b/src/intel/isl/isl.c<br>
@@ -1268,9 +1268,23 @@ isl_calc_row_pitch(const struct isl_device *dev,<br>
const struct isl_extent2d *phys_total_el,<br>
uint32_t *out_row_pitch)<br>
{<br>
- const uint32_t alignment =<br>
+ uint32_t alignment =<br>
isl_calc_row_pitch_alignment(<wbr>surf_info, tile_info);<br>
<br>
+ /* If pitch isn't given and it can be chosen freely, align it by cache line<br>
+ * allowing one to use blit engine on the surface.<br>
+ */<br>
+ if (surf_info->row_pitch == 0 && tile_info->tiling == ISL_TILING_LINEAR) {<br>
+ /* From the Broadwell PRM docs for XY_SRC_COPY_BLT::<wbr>SourceBaseAddress:<br>
+ *<br>
+ * "Base address of the destination surface: X=0, Y=0. Lower 32bits<br>
+ * of the 48bit addressing. When Src Tiling is enabled (Bit_15<br>
+ * enabled), this address must be 4KB-aligned. When Tiling is not<br>
+ * enabled, this address should be CL (64byte) aligned."<br>
+ */<br>
+ alignment = MAX2(alignment, 64);<br>
+ }<br></blockquote><div><br></div><div>I think we want this to be part of isl_calc_row_pitch_alignment<br><br></div><div>Also, eventually, I'd like us to add an ISL_SURF_USAGE_BLIT_BIT and key this as well as the row pitch too large fallback in patch 3 to it. When we go to implement GL_EXT_external_objects, any of these sorts of things which apply on gen7+ will have to be in ISL because we need to guarantee that Vulkan and GL have the same fallbacks at least for external things. For external, Vulkan will have to set the ISL_SURF_USAGE_BLIT_BIT for this reason.<br><br></div><div>--Jason<br></div><div> </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
+<br>
const uint32_t min_row_pitch =<br>
isl_calc_min_row_pitch(dev, surf_info, tile_info, phys_total_el,<br>
alignment);<br>
<span class="HOEnZb"><font color="#888888">--<br>
2.11.0<br>
<br>
______________________________<wbr>_________________<br>
mesa-dev mailing list<br>
<a href="mailto:mesa-dev@lists.freedesktop.org">mesa-dev@lists.freedesktop.org</a><br>
<a href="https://lists.freedesktop.org/mailman/listinfo/mesa-dev" rel="noreferrer" target="_blank">https://lists.freedesktop.org/<wbr>mailman/listinfo/mesa-dev</a><br>
</font></span></blockquote></div><br></div></div>