<div dir="ltr"><div class="gmail_extra"><div class="gmail_quote">On Mon, Jul 31, 2017 at 1:28 PM, Nanley Chery <span dir="ltr"><<a href="mailto:nanleychery@gmail.com" target="_blank">nanleychery@gmail.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div class="HOEnZb"><div class="h5">On Mon, Jul 31, 2017 at 01:03:38PM -0700, Jason Ekstrand wrote:<br>
> On Mon, Jul 31, 2017 at 12:11 PM, Nanley Chery <<a href="mailto:nanleychery@gmail.com">nanleychery@gmail.com</a>><br>
> wrote:<br>
><br>
> > On Sat, Jul 22, 2017 at 04:54:24PM -0700, Jason Ekstrand wrote:<br>
> > > It may technically be possible to enable some sort of fast-clear support<br>
> > > for at least the base slice of a 2D array texture on gen7. However,<br>
> > > it's not documented to work, we've never tried to do it in GL, and we<br>
> > > have no idea what the hardware does if you turn on CCS_D with arrayed<br>
> > > rendering. Let's just play it safe and disallow it for now. If someone<br>
> > > really cares that much about gen7 performance, they can come along and<br>
> > > try to get it working later.<br>
> > > ---<br>
> > > src/intel/isl/isl.c | 34 ++++++++++++++++++++++++------<wbr>----<br>
> > > 1 file changed, 24 insertions(+), 10 deletions(-)<br>
> > ><br>
> > > diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c<br>
> > > index 9cf5821..5465496 100644<br>
> > > --- a/src/intel/isl/isl.c<br>
> > > +++ b/src/intel/isl/isl.c<br>
> > > @@ -1749,9 +1749,30 @@ isl_surf_get_ccs_surf(const struct isl_device<br>
> > *dev,<br>
> > > if (surf->usage & ISL_SURF_USAGE_DISABLE_AUX_<wbr>BIT)<br>
> > > return false;<br>
> > ><br>
> > > + /* The PRM doesn't say this explicitly, but fast-clears don't appear<br>
> > to<br>
> > > + * work for 3D textures until gen9 where the layout of 3D textures<br>
> > changes<br>
> > > + * to match 2D array textures.<br>
> > > + */<br>
> > > if (ISL_DEV_GEN(dev) <= 8 && surf->dim != ISL_SURF_DIM_2D)<br>
> > > return false;<br>
> > ><br>
> > > + /* From the HSW PRM Volume 7: 3D-Media-GPGPU, page 652 (Color Clear<br>
> > of<br>
> > > + * Non-MultiSampler Render Target Restrictions):<br>
> > > + *<br>
> > > + * "Support is for non-mip-mapped and non-array surface types<br>
> > only."<br>
> > > + *<br>
> > > + * This restriction is lifted on gen8+. Technically, it may be<br>
> > possible to<br>
> > > + * create a CCS for an arrayed or mipmapped image and only enable<br>
> > CCS_D<br>
> > > + * when rendering to the base slice. However, there is no<br>
> > documentation<br>
> > > + * tell us what the hardware would do in that case or what it does<br>
> > if you<br>
> > > + * walk off the bases slice. (Does it ignore CCS or does it start<br>
> > > + * scribbling over random memory?) We play it safe and just follow<br>
> > the<br>
> > > + * docs and don't allow CCS_D for arrayed or mip-mapped surfaces.<br>
> > > + */<br>
> > > + if (ISL_DEV_GEN(dev) <= 7 &&<br>
> > > + (surf->levels > 1 || surf->logical_level0_px.array_<wbr>len > 1))<br>
> > > + return false;<br>
> > > +<br>
> ><br>
> > Why are mipmapped surfaces unsafe? A user is restricted to rendering<br>
> > into one miplevel at a time.<br>
> ><br>
><br>
> Same two reasons:<br>
><br>
> 1) The docs say it doesn't work.<br>
> 2) The miptree layout may be complene nonsense when it comes to the CCS.<br>
> On gen8+, the surface is re-laid-out for the auxiliary surface but, on<br>
> gen7, they try to do a direct translation of x/y coordinates in the main<br>
> surface to x/y in the CCS.<br>
><br>
> --Jason<br>
><br>
><br>
<br>
</div></div>Sorry, my question wasn't clear. I meant to ask the following: why<br>
disable CCS completely for mipmapped surfaces instead of enabling it<br>
only for the base miplevel?<br><div class="HOEnZb"><div class="h5"></div></div></blockquote><div><br></div><div>Right. Yes, we could probably enable it in that case. I'm reasonably happy to turn it on and just restrict it like you did before. I was just trying to get something that I knew worked so we could land the anv patches in time.<br><br></div><div>--Jason<br></div><div> </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div class="HOEnZb"><div class="h5">
> > -Nanley<br>
> ><br>
> > > if (isl_format_is_compressed(<wbr>surf->format))<br>
> > > return false;<br>
> > ><br>
> > > @@ -1789,21 +1810,14 @@ isl_surf_get_ccs_surf(const struct isl_device<br>
> > *dev,<br>
> > > return false;<br>
> > > }<br>
> > ><br>
> > > - /* Multi-LOD and multi-layer CCS isn't supported on gen7. */<br>
> > > - const uint8_t levels = ISL_DEV_GEN(dev) <= 7 ? 1 : surf->levels;<br>
> > > - const uint32_t array_len = ISL_DEV_GEN(dev) <= 7 ?<br>
> > > - 1 : surf->logical_level0_px.array_<wbr>len;<br>
> > > - const uint32_t depth = ISL_DEV_GEN(dev) <= 7 ?<br>
> > > - 1 : surf->logical_level0_px.depth;<br>
> > > -<br>
> > > return isl_surf_init(dev, ccs_surf,<br>
> > > .dim = surf->dim,<br>
> > > .format = ccs_format,<br>
> > > .width = surf->logical_level0_px.width,<br>
> > > .height = surf->logical_level0_px.<wbr>height,<br>
> > > - .depth = depth,<br>
> > > - .levels = levels,<br>
> > > - .array_len = array_len,<br>
> > > + .depth = surf->logical_level0_px.depth,<br>
> > > + .levels = surf->levels,<br>
> > > + .array_len = surf->logical_level0_px.array_<wbr>len,<br>
> > > .samples = 1,<br>
> > > .row_pitch = row_pitch,<br>
> > > .usage = ISL_SURF_USAGE_CCS_BIT,<br>
> > > --<br>
> > > 2.5.0.400.gff86faf<br>
> > ><br>
> > > ______________________________<wbr>_________________<br>
> > > mesa-dev mailing list<br>
> > > <a href="mailto:mesa-dev@lists.freedesktop.org">mesa-dev@lists.freedesktop.org</a><br>
> > > <a href="https://lists.freedesktop.org/mailman/listinfo/mesa-dev" rel="noreferrer" target="_blank">https://lists.freedesktop.org/<wbr>mailman/listinfo/mesa-dev</a><br>
> ><br>
</div></div></blockquote></div><br></div></div>