<div dir="ltr"><div class="gmail_extra"><div class="gmail_quote">On Fri, Aug 18, 2017 at 4:31 AM, Eduardo Lima Mitev <span dir="ltr"><<a href="mailto:elima@igalia.com" target="_blank">elima@igalia.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><span class="">On 08/17/2017 09:08 PM, Jason Ekstrand wrote:<br>
> On Thu, Jul 13, 2017 at 7:35 AM, Alejandro Piñeiro <<a href="mailto:apinheiro@igalia.com">apinheiro@igalia.com</a><br>
</span><span class="">> <mailto:<a href="mailto:apinheiro@igalia.com">apinheiro@igalia.com</a>>> wrote:<br>
><br>
> From: Jose Maria Casanova Crespo <<a href="mailto:jmcasanova@igalia.com">jmcasanova@igalia.com</a><br>
</span>> <mailto:<a href="mailto:jmcasanova@igalia.com">jmcasanova@igalia.com</a>><wbr>><br>
<div><div class="h5">><br>
> nir_type_conversion enables new operations to handle rounding modes to<br>
> convert to fp16 values. Two new opcodes are enabled nir_op_f2f16_rtne<br>
> and nir_op_f2f16_rtz.<br>
><br>
> The undefined behaviour doesn't has any effect and uses the original<br>
> nir_op_f2f16 operation.<br>
> ---<br>
> src/compiler/glsl/glsl_to_nir.<wbr>cpp | 3 ++-<br>
> src/compiler/nir/nir.h | 3 ++-<br>
> src/compiler/nir/nir_opcodes.<wbr>py | 10 ++++++++--<br>
> src/compiler/nir/nir_opcodes_<wbr>c.py | 15 ++++++++++++++-<br>
> src/compiler/spirv/vtn_alu.c | 2 +-<br>
> 5 files changed, 27 insertions(+), 6 deletions(-)<br>
><br>
> diff --git a/src/compiler/glsl/glsl_to_<wbr>nir.cpp<br>
> b/src/compiler/glsl/glsl_to_<wbr>nir.cpp<br>
> index 2153004..23e6121 100644<br>
> --- a/src/compiler/glsl/glsl_to_<wbr>nir.cpp<br>
> +++ b/src/compiler/glsl/glsl_to_<wbr>nir.cpp<br>
> @@ -1509,7 +1509,8 @@ nir_visitor::visit(ir_<wbr>expression *ir)<br>
> case ir_unop_u642i64: {<br>
> nir_alu_type src_type =<br>
> nir_get_nir_type_for_glsl_<wbr>base_type(types[0]);<br>
> nir_alu_type dst_type =<br>
> nir_get_nir_type_for_glsl_<wbr>base_type(out_type);<br>
> - result = nir_build_alu(&b, nir_type_conversion_op(src_<wbr>type,<br>
> dst_type),<br>
> + result = nir_build_alu(&b, nir_type_conversion_op(src_<wbr>type,<br>
> dst_type,<br>
> + nir_rounding_mode_undef),<br>
> srcs[0], NULL, NULL, NULL);<br>
> /* b2i and b2f don't have fixed bit-size versions so the<br>
> builder will<br>
> * just assume 32 and we have to fix it up here.<br>
> diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h<br>
> index 115ec1b..7e48e18 100644<br>
> --- a/src/compiler/nir/nir.h<br>
> +++ b/src/compiler/nir/nir.h<br>
> @@ -741,7 +741,8 @@ nir_get_nir_type_for_glsl_<wbr>type(const struct<br>
> glsl_type *type)<br>
> return<br>
> nir_get_nir_type_for_glsl_<wbr>base_type(glsl_get_base_type(<wbr>type));<br>
> }<br>
><br>
> -nir_op nir_type_conversion_op(nir_<wbr>alu_type src, nir_alu_type dst);<br>
> +nir_op nir_type_conversion_op(nir_<wbr>alu_type src, nir_alu_type dst,<br>
> + nir_rounding_mode rnd);<br>
><br>
> typedef enum {<br>
> NIR_OP_IS_COMMUTATIVE = (1 << 0),<br>
> diff --git a/src/compiler/nir/nir_<wbr>opcodes.py<br>
> b/src/compiler/nir/nir_<wbr>opcodes.py<br>
> index 39c01a7..bd342de 100644<br>
> --- a/src/compiler/nir/nir_<wbr>opcodes.py<br>
> +++ b/src/compiler/nir/nir_<wbr>opcodes.py<br>
> @@ -179,8 +179,14 @@ for src_t in [tint, tuint, tfloat]:<br>
> else:<br>
> bit_sizes = [8, 16, 32, 64]<br>
> for bit_size in bit_sizes:<br>
> - unop_convert("{0}2{1}{2}".<wbr>format(src_t[0], dst_t[0],<br>
> bit_size),<br>
> - dst_t + str(bit_size), src_t, "src0")<br>
> + if bit_size == 16 and dst_t == tfloat and src_t == tfloat:<br>
> + rnd_modes = ['rtne', 'rtz']<br>
> + for rnd_mode in rnd_modes:<br>
> + unop_convert("{0}2{1}{2}_{3}".<wbr>format(src_t[0],<br>
> dst_t[0],<br>
> + bit_size,<br>
> rnd_mode),<br>
> + dst_t + str(bit_size), src_t, "src0")<br>
> + unop_convert("{0}2{1}{2}".<wbr>format(src_t[0], dst_t[0],<br>
> bit_size),<br>
> + dst_t + str(bit_size), src_t, "src0")<br>
><br>
><br>
> You could do this a bit shorter if you make rnd_modes = ['', '_rtne',<br>
> 'rtz'] and then just loop over them.<br>
><br>
<br>
</div></div>Hmm, I don't think we can reduce it that way. Notice that the loop over<br>
rnd_modes is only for bit_size==16, but the last unop_convert call,<br>
outside the loop, applies to all bit sizes.<br><div><div class="h5"></div></div></blockquote><div><br></div><div>Right. Sorry for the noise.<br></div><div> </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div><div class="h5">
><br>
><br>
> # We'll hand-code the to/from bool conversion opcodes. Because<br>
> bool doesn't<br>
> # have multiple bit-sizes, we can always infer the size from the<br>
> other type.<br>
> diff --git a/src/compiler/nir/nir_<wbr>opcodes_c.py<br>
> b/src/compiler/nir/nir_<wbr>opcodes_c.py<br>
> index a1db54f..a7721d3 100644<br>
> --- a/src/compiler/nir/nir_<wbr>opcodes_c.py<br>
> +++ b/src/compiler/nir/nir_<wbr>opcodes_c.py<br>
> @@ -30,7 +30,7 @@ template = Template("""<br>
> #include "nir.h"<br>
><br>
> nir_op<br>
> -nir_type_conversion_op(nir_<wbr>alu_type src, nir_alu_type dst)<br>
> +nir_type_conversion_op(nir_<wbr>alu_type src, nir_alu_type dst,<br>
> nir_rounding_mode rnd)<br>
> {<br>
> nir_alu_type src_base = (nir_alu_type)<br>
> nir_alu_type_get_base_type(<wbr>src);<br>
> nir_alu_type dst_base = (nir_alu_type)<br>
> nir_alu_type_get_base_type(<wbr>dst);<br>
> @@ -64,7 +64,20 @@ nir_type_conversion_op(nir_<wbr>alu_type src,<br>
> nir_alu_type dst)<br>
> switch (dst_bit_size) {<br>
> % for dst_bits in [32, 64]:<br>
> case ${dst_bits}:<br>
> +% if src_t == 'float' and dst_t == 'float' and<br>
> dst_bits == 16:<br>
> + switch(rnd) {<br>
> +% for rnd_t in ['rtne' , 'rtz']:<br>
> + case nir_rounding_mode_${rnd_t}:<br>
> + return<br>
> ${'nir_op_{0}2{1}{2}_{3}'.<wbr>format(src_t[0], dst_t[0],<br>
> +<br>
> dst_bits, rnd_t)};<br>
> +% endfor<br>
> + default:<br>
><br>
><br>
> This default makes me a bit uncomfortable. I think I'd rather<br>
> assert-fail if it's a rounding mode we don't have an opcode for.<br>
> Otherwise, this function is just silently ignoring rounding modes which<br>
> seems bad.<br>
><br>
<br>
</div></div>Ok, we'll fix that.<br>
<span class=""><br>
><br>
> + return<br>
> ${'nir_op_{0}2{1}{2}'.format(<wbr>src_t[0], dst_t[0],<br>
> +<br>
> dst_bits)};<br>
> + }<br>
> +% else:<br>
><br>
><br>
> The indentation on the above is a bit weird. I'm not really sure what<br>
> to do with it. What I would say is that you shouldn't worry too much<br>
> about making the resulting C nicely indented. Just make the generator<br>
> readable.<br>
><br>
<br>
</span>Ok, note taken.<br>
<span class=""><br>
><br>
> return ${'nir_op_{0}2{1}{2}'.format(<wbr>src_t[0],<br>
> dst_t[0], dst_bits)};<br>
> +% endif<br>
> % endfor<br>
> default:<br>
> unreachable("Invalid nir alu bit size");<br>
> diff --git a/src/compiler/spirv/vtn_alu.c b/src/compiler/spirv/vtn_alu.c<br>
> index ecf9cbc..7ec30b8 100644<br>
> --- a/src/compiler/spirv/vtn_alu.c<br>
> +++ b/src/compiler/spirv/vtn_alu.c<br>
> @@ -355,7 +355,7 @@ vtn_nir_alu_op_for_spirv_<wbr>opcode(SpvOp opcode,<br>
> bool *swap,<br>
> case SpvOpConvertUToF:<br>
> case SpvOpSConvert:<br>
> case SpvOpFConvert:<br>
> - return nir_type_conversion_op(src, dst);<br>
> + return nir_type_conversion_op(src, dst, nir_rounding_mode_undef);<br>
><br>
> /* Derivatives: */<br>
> case SpvOpDPdx: return nir_op_fddx;<br>
> --<br>
> 2.9.3<br>
><br>
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</div></div></blockquote></div><br></div></div>