<div dir="ltr">Nice! I wondered if it would be possible to do something like this. This will be useful :)<div class="gmail_extra"><br><div class="gmail_quote">On 5 September 2017 at 20:17, Samuel Pitoiset <span dir="ltr"><<a href="mailto:samuel.pitoiset@gmail.com" target="_blank">samuel.pitoiset@gmail.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">Only the ASM is currently dumped.<br>
<br>
Signed-off-by: Samuel Pitoiset <<a href="mailto:samuel.pitoiset@gmail.com">samuel.pitoiset@gmail.com</a>><br>
---<br>
 src/amd/vulkan/radv_debug.c | 58 ++++++++++++++++++++++++++++++<wbr>+++++++++++----<br>
 1 file changed, 53 insertions(+), 5 deletions(-)<br>
<br>
diff --git a/src/amd/vulkan/radv_debug.c b/src/amd/vulkan/radv_debug.c<br>
index a1c0a61997..f2339dfe71 100644<br>
--- a/src/amd/vulkan/radv_debug.c<br>
+++ b/src/amd/vulkan/radv_debug.c<br>
@@ -68,13 +68,49 @@ radv_dump_trace(struct radv_device *device, struct radeon_winsys_cs *cs)<br>
        fclose(f);<br>
 }<br>
<br>
+static void<br>
+radv_dump_gfx_shaders(struct radv_pipeline *pipeline)<br>
+{<br>
+       unsigned mask;<br>
+<br>
+       mask = pipeline->active_stages;<br>
+       while (mask) {<br>
+               struct radv_shader_variant *variant;<br>
+               int stage = u_bit_scan(&mask);<br>
+<br>
+               variant = pipeline->shaders[stage];<br>
+               assert(variant);<br>
+<br>
+               fprintf(stderr, "%s:\n%s\n\n",<br>
+                       radv_get_shader_name(variant, stage),<br>
+                       variant->binary.disasm_string)<wbr>;<br>
+       }<br>
+}<br></blockquote><div><br></div><div>Will this also work for compute shaders on the GFX queue? From quick grepping it doesn't look like active_stages ever gets compute set in it, just graphics stages.<br></div><div><br></div><div>Alex</div><div> </div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">
+<br>
+static struct radv_pipeline *<br>
+radv_get_bound_pipeline(<wbr>struct radv_device *device)<br>
+{<br>
+       uint64_t *ptr = (uint64_t *)device->trace_id_ptr;<br>
+<br>
+       return (struct radv_pipeline *)ptr[1];<br>
+}<br>
+<br>
+static void<br>
+radv_dump_gfx_state(struct radv_device *device)<br>
+{<br>
+       struct radv_pipeline *pipeline;<br>
+<br>
+       pipeline = radv_get_bound_pipeline(<wbr>device);<br>
+       if (!pipeline)<br>
+               return;<br>
+<br>
+       radv_dump_gfx_shaders(<wbr>pipeline);<br>
+}<br>
+<br>
 static bool<br>
-radv_gpu_hang_occured(struct radv_queue *queue)<br>
+radv_gpu_hang_occured(struct radv_queue *queue, enum ring_type ring)<br>
 {<br>
        struct radeon_winsys *ws = queue->device->ws;<br>
-       enum ring_type ring;<br>
-<br>
-       ring = radv_queue_family_to_ring(<wbr>queue->queue_family_index);<br>
<br>
        if (!ws->ctx_wait_idle(queue->hw_<wbr>ctx, ring, queue->queue_idx))<br>
                return true;<br>
@@ -86,9 +122,12 @@ void<br>
 radv_check_gpu_hangs(struct radv_queue *queue, struct radeon_winsys_cs *cs)<br>
 {<br>
        struct radv_device *device = queue->device;<br>
+       enum ring_type ring;<br>
        uint64_t addr;<br>
<br>
-       if (!radv_gpu_hang_occured(queue)<wbr>)<br>
+       ring = radv_queue_family_to_ring(<wbr>queue->queue_family_index);<br>
+<br>
+       if (!radv_gpu_hang_occured(queue, ring))<br>
                return;<br>
<br>
        if (ac_vm_fault_occured(device-><wbr>physical_device->rad_info.<wbr>chip_class,<br>
@@ -97,6 +136,15 @@ radv_check_gpu_hangs(struct radv_queue *queue, struct radeon_winsys_cs *cs)<br>
                fprintf(stderr, "Failing VM page: 0x%08"PRIx64"\n\n", addr);<br>
        }<br>
<br>
+       switch (ring) {<br>
+       case RING_GFX:<br>
+               radv_dump_gfx_state(device);<br>
+               break;<br>
+       default:<br>
+               assert(0);<br>
+               break;<br>
+       }<br>
+<br>
        radv_dump_trace(queue->device, cs);<br>
        abort();<br>
 }<br>
<span class="gmail-HOEnZb"><font color="#888888">--<br>
2.14.1<br>
<br>
______________________________<wbr>_________________<br>
mesa-dev mailing list<br>
<a href="mailto:mesa-dev@lists.freedesktop.org">mesa-dev@lists.freedesktop.org</a><br>
<a href="https://lists.freedesktop.org/mailman/listinfo/mesa-dev" rel="noreferrer" target="_blank">https://lists.freedesktop.org/<wbr>mailman/listinfo/mesa-dev</a><br>
</font></span></blockquote></div><br></div></div><div class="gmail_extra"><br><div class="gmail_quote">On 5 September 2017 at 20:17, Samuel Pitoiset <span dir="ltr"><<a href="mailto:samuel.pitoiset@gmail.com" target="_blank">samuel.pitoiset@gmail.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Only the ASM is currently dumped.<br>
<br>
Signed-off-by: Samuel Pitoiset <<a href="mailto:samuel.pitoiset@gmail.com">samuel.pitoiset@gmail.com</a>><br>
---<br>
 src/amd/vulkan/radv_debug.c | 58 ++++++++++++++++++++++++++++++<wbr>+++++++++++----<br>
 1 file changed, 53 insertions(+), 5 deletions(-)<br>
<br>
diff --git a/src/amd/vulkan/radv_debug.c b/src/amd/vulkan/radv_debug.c<br>
index a1c0a61997..f2339dfe71 100644<br>
--- a/src/amd/vulkan/radv_debug.c<br>
+++ b/src/amd/vulkan/radv_debug.c<br>
@@ -68,13 +68,49 @@ radv_dump_trace(struct radv_device *device, struct radeon_winsys_cs *cs)<br>
        fclose(f);<br>
 }<br>
<br>
+static void<br>
+radv_dump_gfx_shaders(struct radv_pipeline *pipeline)<br>
+{<br>
+       unsigned mask;<br>
+<br>
+       mask = pipeline->active_stages;<br>
+       while (mask) {<br>
+               struct radv_shader_variant *variant;<br>
+               int stage = u_bit_scan(&mask);<br>
+<br>
+               variant = pipeline->shaders[stage];<br>
+               assert(variant);<br>
+<br>
+               fprintf(stderr, "%s:\n%s\n\n",<br>
+                       radv_get_shader_name(variant, stage),<br>
+                       variant->binary.disasm_string)<wbr>;<br>
+       }<br>
+}<br>
+<br>
+static struct radv_pipeline *<br>
+radv_get_bound_pipeline(<wbr>struct radv_device *device)<br>
+{<br>
+       uint64_t *ptr = (uint64_t *)device->trace_id_ptr;<br>
+<br>
+       return (struct radv_pipeline *)ptr[1];<br>
+}<br>
+<br>
+static void<br>
+radv_dump_gfx_state(struct radv_device *device)<br>
+{<br>
+       struct radv_pipeline *pipeline;<br>
+<br>
+       pipeline = radv_get_bound_pipeline(<wbr>device);<br>
+       if (!pipeline)<br>
+               return;<br>
+<br>
+       radv_dump_gfx_shaders(<wbr>pipeline);<br>
+}<br>
+<br>
 static bool<br>
-radv_gpu_hang_occured(struct radv_queue *queue)<br>
+radv_gpu_hang_occured(struct radv_queue *queue, enum ring_type ring)<br>
 {<br>
        struct radeon_winsys *ws = queue->device->ws;<br>
-       enum ring_type ring;<br>
-<br>
-       ring = radv_queue_family_to_ring(<wbr>queue->queue_family_index);<br>
<br>
        if (!ws->ctx_wait_idle(queue->hw_<wbr>ctx, ring, queue->queue_idx))<br>
                return true;<br>
@@ -86,9 +122,12 @@ void<br>
 radv_check_gpu_hangs(struct radv_queue *queue, struct radeon_winsys_cs *cs)<br>
 {<br>
        struct radv_device *device = queue->device;<br>
+       enum ring_type ring;<br>
        uint64_t addr;<br>
<br>
-       if (!radv_gpu_hang_occured(queue)<wbr>)<br>
+       ring = radv_queue_family_to_ring(<wbr>queue->queue_family_index);<br>
+<br>
+       if (!radv_gpu_hang_occured(queue, ring))<br>
                return;<br>
<br>
        if (ac_vm_fault_occured(device-><wbr>physical_device->rad_info.<wbr>chip_class,<br>
@@ -97,6 +136,15 @@ radv_check_gpu_hangs(struct radv_queue *queue, struct radeon_winsys_cs *cs)<br>
                fprintf(stderr, "Failing VM page: 0x%08"PRIx64"\n\n", addr);<br>
        }<br>
<br>
+       switch (ring) {<br>
+       case RING_GFX:<br>
+               radv_dump_gfx_state(device);<br>
+               break;<br>
+       default:<br>
+               assert(0);<br>
+               break;<br>
+       }<br>
+<br>
        radv_dump_trace(queue->device, cs);<br>
        abort();<br>
 }<br>
<span class="HOEnZb"><font color="#888888">--<br>
2.14.1<br>
<br>
______________________________<wbr>_________________<br>
mesa-dev mailing list<br>
<a href="mailto:mesa-dev@lists.freedesktop.org">mesa-dev@lists.freedesktop.org</a><br>
<a href="https://lists.freedesktop.org/mailman/listinfo/mesa-dev" rel="noreferrer" target="_blank">https://lists.freedesktop.org/<wbr>mailman/listinfo/mesa-dev</a><br>
</font></span></blockquote></div><br></div>