<div dir="ltr"><div class="gmail_extra"><div class="gmail_quote">I've looked at this patch and I think it's correct. I'd like to see how it's used before I pass any judgements on whether or not I like it. If we are going to go this direction, I'd like to see some follow-up that deletes the final_assembly_size parameter from all of the brw_compile_* functions. </div><div class="gmail_quote"> </div><div class="gmail_quote">On Wed, Oct 18, 2017 at 10:32 PM, Jordan Justen <<a href="mailto:jordan.l.justen@intel.com" target="_blank">jordan.l.justen@intel.com</a>> wrote: <blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">From: Carl Worth <<a href="mailto:cworth@cworth.org">cworth@cworth.org</a>> </blockquote><div> </div><div>Hey look, a patch from cworth. :) </div><div> </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"> This will be used by the on disk shader cache. v2: * Set in brw_compile_* rather than brw_codegen_*. (Jason) Signed-off-by: Timothy Arceri <<a href="mailto:timothy.arceri@collabora.com">timothy.arceri@collabora.com</a>> [<a href="mailto:jordan.l.justen@intel.com">jordan.l.justen@intel.com</a>: Only add to brw_stage_prog_data] Signed-off-by: Jordan Justen <<a href="mailto:jordan.l.justen@intel.com">jordan.l.justen@intel.com</a>> --- src/intel/compiler/brw_compiler.h | 2 ++ src/intel/compiler/brw_fs.cpp | 8 ++++++-- src/intel/compiler/brw_shader.cpp | 12 ++++++++---- src/intel/compiler/brw_vec4.cpp | 1 + src/intel/compiler/brw_vec4_gs_visitor.cpp | 14 ++++++++++---- src/intel/compiler/brw_vec4_tcs.cpp | 12 ++++++++---- 6 files changed, 35 insertions(+), 14 deletions(-) diff --git a/src/intel/compiler/brw_compiler.h b/src/intel/compiler/brw_compiler.h index 014202d36c..b57834ddaa 100644 --- a/src/intel/compiler/brw_compiler.h +++ b/src/intel/compiler/brw_compiler.h @@ -588,6 +588,8 @@ struct brw_stage_prog_data { unsigned total_scratch; unsigned total_shared; + unsigned program_size; + /** * Register where the thread expects to find input data from the URB * (typically uniforms, followed by vertex or fragment attributes). diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp index 66cb33131b..77f704ec99 100644 --- a/src/intel/compiler/brw_fs.cpp +++ b/src/intel/compiler/brw_fs.cpp @@ -6666,7 +6666,9 @@ brw_compile_fs(const struct brw_compiler *compiler, void *log_data, prog_data->reg_blocks_0 = brw_register_blocks(simd16_grf_used); } - return g.get_assembly(final_assembly_size); + const unsigned *assembly = g.get_assembly(final_assembly_size); + prog_data->base.program_size = *final_assembly_size; + return assembly; } fs_reg * @@ -6865,7 +6867,9 @@ brw_compile_cs(const struct brw_compiler *compiler, void *log_data, g.generate_code(cfg, prog_data->simd_size); - return g.get_assembly(final_assembly_size); + const unsigned *assembly = g.get_assembly(final_assembly_size); + prog_data->base.program_size = *final_assembly_size; + return assembly; } /** diff --git a/src/intel/compiler/brw_shader.cpp b/src/intel/compiler/brw_shader.cpp index 83ad152f89..f00da96f68 100644 --- a/src/intel/compiler/brw_shader.cpp +++ b/src/intel/compiler/brw_shader.cpp @@ -1166,6 +1166,7 @@ brw_compile_tes(const struct brw_compiler *compiler, { const struct gen_device_info *devinfo = compiler->devinfo; const bool is_scalar = compiler->scalar_stage[MESA_SHADER_TESS_EVAL]; + const unsigned *assembly; nir_shader *nir = nir_shader_clone(mem_ctx, src_shader); nir->info.inputs_read = key->inputs_read; @@ -1274,7 +1275,7 @@ brw_compile_tes(const struct brw_compiler *compiler, g.generate_code(v.cfg, 8); - return g.get_assembly(final_assembly_size); + assembly = g.get_assembly(final_assembly_size); } else { brw::vec4_tes_visitor v(compiler, log_data, key, prog_data, nir, mem_ctx, shader_time_index); @@ -1287,8 +1288,11 @@ brw_compile_tes(const struct brw_compiler *compiler, if (unlikely(INTEL_DEBUG & DEBUG_TES)) v.dump_instructions(); - return brw_vec4_generate_assembly(compiler, log_data, mem_ctx, nir, - &prog_data->base, v.cfg, - final_assembly_size); + assembly = brw_vec4_generate_assembly(compiler, log_data, mem_ctx, nir, + &prog_data->base, v.cfg, + final_assembly_size); } + + prog_data->base.base.program_size = *final_assembly_size; + return assembly; } diff --git a/src/intel/compiler/brw_vec4.cpp b/src/intel/compiler/brw_vec4.cpp index 04304fcb45..b7af8860e8 100644 --- a/src/intel/compiler/brw_vec4.cpp +++ b/src/intel/compiler/brw_vec4.cpp @@ -2905,6 +2905,7 @@ brw_compile_vs(const struct brw_compiler *compiler, void *log_data, final_assembly_size); } + prog_data->base.base.program_size = *final_assembly_size; return assembly; } diff --git a/src/intel/compiler/brw_vec4_gs_visitor.cpp b/src/intel/compiler/brw_vec4_gs_visitor.cpp index 5df6d562ce..11b73f187c 100644 --- a/src/intel/compiler/brw_vec4_gs_visitor.cpp +++ b/src/intel/compiler/brw_vec4_gs_visitor.cpp @@ -868,7 +868,9 @@ brw_compile_gs(const struct brw_compiler *compiler, void *log_data, g.enable_debug(name); } g.generate_code(v.cfg, 8); - return g.get_assembly(final_assembly_size); + const unsigned *ret = g.get_assembly(final_assembly_size); + prog_data->base.base.program_size = *final_assembly_size; + return ret; } } @@ -897,9 +899,12 @@ brw_compile_gs(const struct brw_compiler *compiler, void *log_data, if (v.run()) { /* Success! Backup is not needed */ ralloc_free(param); - return brw_vec4_generate_assembly(compiler, log_data, mem_ctx, - shader, &prog_data->base, v.cfg, - final_assembly_size); + const unsigned *ret = + brw_vec4_generate_assembly(compiler, log_data, mem_ctx, shader, + &prog_data->base, v.cfg, + final_assembly_size); + prog_data->base.base.program_size = *final_assembly_size; + return ret; } else { /* These variables could be modified by the execution of the GS * visitor if it packed the uniforms in the push constant buffer. @@ -967,6 +972,7 @@ brw_compile_gs(const struct brw_compiler *compiler, void *log_data, } delete gs; + prog_data->base.base.program_size = *final_assembly_size; return ret; } diff --git a/src/intel/compiler/brw_vec4_tcs.cpp b/src/intel/compiler/brw_vec4_tcs.cpp index c4d9f89a91..04feb6bdf1 100644 --- a/src/intel/compiler/brw_vec4_tcs.cpp +++ b/src/intel/compiler/brw_vec4_tcs.cpp @@ -388,6 +388,7 @@ brw_compile_tcs(const struct brw_compiler *compiler, const struct gen_device_info *devinfo = compiler->devinfo; struct brw_vue_prog_data *vue_prog_data = &prog_data->base; const bool is_scalar = compiler->scalar_stage[MESA_SHADER_TESS_CTRL]; + const unsigned *assembly; nir_shader *nir = nir_shader_clone(mem_ctx, src_shader); nir->info.outputs_written = key->outputs_written; @@ -487,7 +488,7 @@ brw_compile_tcs(const struct brw_compiler *compiler, g.generate_code(v.cfg, 8); - return g.get_assembly(final_assembly_size); + assembly = g.get_assembly(final_assembly_size); } else { vec4_tcs_visitor v(compiler, log_data, key, prog_data, nir, mem_ctx, shader_time_index, &input_vue_map); @@ -501,10 +502,13 @@ brw_compile_tcs(const struct brw_compiler *compiler, v.dump_instructions(); - return brw_vec4_generate_assembly(compiler, log_data, mem_ctx, nir, - &prog_data->base, v.cfg, - final_assembly_size); + assembly = brw_vec4_generate_assembly(compiler, log_data, mem_ctx, nir, + &prog_data->base, v.cfg, + final_assembly_size); } + + prog_data->base.base.program_size = *final_assembly_size; + return assembly; } -- 2.15.0.rc0 _______________________________________________ mesa-dev mailing list <a href="mailto:mesa-dev@lists.freedesktop.org">mesa-dev@lists.freedesktop.org</a> <a href="https://lists.freedesktop.org/mailman/listinfo/mesa-dev" rel="noreferrer" target="_blank">https://lists.freedesktop.org/mailman/listinfo/mesa-dev</a> </blockquote></div> </div></div>