<div dir="ltr"><div class="gmail_extra"><div class="gmail_quote">On Thu, Oct 12, 2017 at 11:38 AM, Jose Maria Casanova Crespo <span dir="ltr"><<a href="mailto:jmcasanova@igalia.com" target="_blank">jmcasanova@igalia.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">From: Eduardo Lima Mitev <<a href="mailto:elima@igalia.com">elima@igalia.com</a>><br>
<br>
Currently, we use byte-scattered write messages for storing 16-bit<br>
into an SSBO. This is because untyped surface messages have a fixed<br>
32-bit size.<br>
<br>
This patch optimizes these 16-bit writes by combining 2 values (e.g,<br>
two consecutive components) into a 32-bit register, packing the two<br>
16-bit words.<br>
<br>
16-bit single component values will continue to use byte-scattered<br>
write messages.<br>
<br>
This optimization reduces the number of SEND messages used for storing<br>
16-bit values potentially by 2 or 4, which cuts down execution time<br>
significantly because byte-scattered writes are an expensive<br>
operation.<br>
<br>
v2: Removed use of stride = 2 on sources (Jason Ekstrand)<br>
    Rework optimization using shuffle 16 write and enable writes<br>
    of 16bit vec4 with only one message of 32-bits. (Chema Casanova)<br>
<br>
Signed-off-by: Jose Maria Casanova Crespo <<a href="mailto:jmcasanova@igalia.com">jmcasanova@igalia.com</a>><br>
Signed-off-by: Eduardo Lima <<a href="mailto:elima@igalia.com">elima@igalia.com</a>><br>
---<br>
 src/intel/compiler/brw_fs_nir.<wbr>cpp | 64 ++++++++++++++++++++++++++++++<wbr>+--------<br>
 1 file changed, 52 insertions(+), 12 deletions(-)<br>
<br>
diff --git a/src/intel/compiler/brw_fs_<wbr>nir.cpp b/src/intel/compiler/brw_fs_<wbr>nir.cpp<br>
index 2d0b3e139e..c07b3e4d8d 100644<br>
--- a/src/intel/compiler/brw_fs_<wbr>nir.cpp<br>
+++ b/src/intel/compiler/brw_fs_<wbr>nir.cpp<br>
@@ -4218,6 +4218,9 @@ fs_visitor::nir_emit_<wbr>intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr<br>
             instr->num_components);<br>
          val_reg = tmp;<br>
       }<br>
+      if (bit_size == 16) {<br>
+         val_reg=retype(val_reg, BRW_REGISTER_TYPE_HF);<br>
+      }<br>
<br>
       /* 16-bit types would use a minimum of 1 slot */<br>
       unsigned type_slots = MAX2(type_size / 4, 1);<br>
@@ -4231,6 +4234,9 @@ fs_visitor::nir_emit_<wbr>intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr<br>
          unsigned first_component = ffs(writemask) - 1;<br>
          unsigned length = ffs(~(writemask >> first_component)) - 1;<br>
<br>
+         fs_reg current_val_reg =<br>
+            offset(val_reg, bld, first_component * type_slots);<br>
+<br>
          /* We can't write more than 2 64-bit components at once. Limit the<br>
           * length of the write to what we can do and let the next iteration<br>
           * handle the rest<br>
@@ -4238,11 +4244,40 @@ fs_visitor::nir_emit_<wbr>intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr<br>
          if (type_size > 4) {<br>
             length = MIN2(2, length);<br>
          } else if (type_size == 2) {<br>
-            /* For 16-bit types we are using byte scattered writes, that can<br>
-             * only write one component per call. So we limit the length, and<br>
-             * let the write happening in several iterations.<br>
+            /* For 16-bit types we pack two consecutive values into a<br>
+             * 32-bit word and use an untyped write message. For single values<br>
+             * we need to use byte-scattered writes because untyped writes work<br>
+             * on multiples of 32 bits.<br>
+             *<br>
+             * For example, if there is a 3-component vector we submit one<br>
+             * untyped-write message of 32-bit (first two components), and one<br>
+             * byte-scattered write message (the last component).<br>
              */<br>
-            length = 1;<br>
+            if (length >= 2) {<br>
+               /* pack two consecutive 16-bit words into a 32-bit register,<br>
+                * using the same original source register.<br>
+                */<br></blockquote><div><br></div><div>This doesn't work if you have a writemask of .xz<br></div><div> </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
+               length -= length % 2;<br></blockquote><div><br></div><div>I'm very confused by this bit of math.<br></div><div> </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
+               fs_reg tmp = bld.vgrf(BRW_REGISTER_TYPE_F, length / 2);<br>
+               shuffle_16bit_data_for_32bit_<wbr>write(bld,<br>
+                                                  tmp,<br>
+                                                  current_val_reg,<br>
+                                                  length);<br>
+               current_val_reg = tmp;<br>
+<br>
+            } else {<br>
+               /* For single 16-bit values, we just limit the length to 1 and<br>
+                * use a byte-scattered write message below.<br>
+                */<br>
+               length = 1;<br></blockquote><div><br></div><div>I think this can be an assert.  Also, why do we need the shuffle?  I thought this case would work if we just set length == 1.</div><div><br></div><div>I answered my own question about the shuffle.  It lets us delete some code below.<br></div><div> </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
+               fs_reg tmp = bld.vgrf(BRW_REGISTER_TYPE_F);<br>
+               shuffle_16bit_data_for_32bit_<wbr>write(bld,<br>
+                                                  tmp,<br>
+                                                  current_val_reg,<br>
+                                                  length); <br></blockquote><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
+               current_val_reg = tmp;<br>
+<br>
+            }<br>
          }<br>
<br>
          fs_reg offset_reg;<br>
@@ -4257,24 +4292,29 @@ fs_visitor::nir_emit_<wbr>intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr<br>
                     brw_imm_ud(type_size * first_component));<br>
          }<br>
<br>
-         if (type_size == 2) {<br>
+         if (type_size == 2 && length == 1) {<br></blockquote><div><br></div>I'd rather see us do a type_size correction above and just make this one "if (type_size == 2) {" or, even better yet "if (type_size < 4) { assert(type_size == 2);"<br></div><div class="gmail_quote"><div> </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
             /* Untyped Surface messages have a fixed 32-bit size, so we need<br>
              * to rely on byte scattered in order to write 16-bit elements.<br>
              * The byte_scattered_write message needs that every written 16-bit<br>
              * type to be aligned 32-bits (stride=2).<br>
              */<br>
-            fs_reg tmp = bld.vgrf(BRW_REGISTER_TYPE_F);<br>
-            val_reg.type = BRW_REGISTER_TYPE_HF;<br>
-            bld.MOV (subscript(tmp, BRW_REGISTER_TYPE_HF, 0),<br>
-                     offset(val_reg, bld, first_component));<br>
             emit_byte_scattered_write(bld, surf_index, offset_reg,<br>
-                                      tmp,<br>
+                                      current_val_reg,<br>
                                       1 /* dims */, length * type_slots,<br>
                                       BRW_PREDICATE_NONE);<br>
          } else {<br>
+            unsigned write_size = length * type_slots;<br>
+<br>
+            /* We need to half the write size of the untyped write message when<br>
+             * submitting two packed 16-bit values, because length is 2 but the<br>
+             * type size is 16-bit. So we are effectively writing just 32 bits<br>
+             * (size = 1).<br>
+             */<br>
+            if (type_size == 2)<br>
+               write_size /= 2;<br></blockquote><div><br></div><div>Can we not do this correction higher up where we decide to pack two 16-bit things into a single 32-bit thing?<br></div><div> </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
             emit_untyped_write(bld, surf_index, offset_reg,<br>
-                               offset(val_reg, bld, first_component * type_slots),<br>
-                               1 /* dims */, length * type_slots,<br>
+                               current_val_reg,<br>
+                               1 /* dims */, write_size,<br>
                                BRW_PREDICATE_NONE);<br>
          }<br>
<span class="HOEnZb"><font color="#888888"><br>
--<br>
2.13.6<br>
<br>
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