<div dir="ltr"><div class="gmail_extra"><div class="gmail_quote">On Tue, Oct 31, 2017 at 10:55 AM, Neil Roberts <span dir="ltr"><<a href="mailto:nroberts@igalia.com" target="_blank">nroberts@igalia.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Instead of letting nir lower nir_intrinsic_load_subgroup_<wbr>all_mask this<br>
is now generated directly. This is more efficient because it can be<br>
calculated in the compiler based on the dispatch width.<br>
<br>
Sadly it’s still not totally ideal because the constant doesn’t seem<br>
to get propagated and there is still a redundant MOV.<br>
---<br>
src/intel/compiler/brw_<wbr>compiler.c | 2 +-<br>
src/intel/compiler/brw_fs_nir.<wbr>cpp | 7 ++++++-<br>
2 files changed, 7 insertions(+), 2 deletions(-)<br>
<br>
diff --git a/src/intel/compiler/brw_<wbr>compiler.c b/src/intel/compiler/brw_<wbr>compiler.c<br>
index 8df0d2e..f02fceb 100644<br>
--- a/src/intel/compiler/brw_<wbr>compiler.c<br>
+++ b/src/intel/compiler/brw_<wbr>compiler.c<br>
@@ -57,7 +57,7 @@ static const struct nir_shader_compiler_options scalar_nir_options = {<br>
.lower_unpack_snorm_4x8 = true,<br>
.lower_unpack_unorm_2x16 = true,<br>
.lower_unpack_unorm_4x8 = true,<br>
- .lower_subgroup_all_mask = true,<br>
+ .lower_subgroup_all_mask = false,<br>
.lower_subgroup_masks = true,<br>
.max_subgroup_size = 32,<br>
.max_unroll_iterations = 32,<br>
diff --git a/src/intel/compiler/brw_fs_<wbr>nir.cpp b/src/intel/compiler/brw_fs_<wbr>nir.cpp<br>
index 9202b0f..b73edc9 100644<br>
--- a/src/intel/compiler/brw_fs_<wbr>nir.cpp<br>
+++ b/src/intel/compiler/brw_fs_<wbr>nir.cpp<br>
@@ -4185,7 +4185,12 @@ fs_visitor::nir_emit_<wbr>intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr<br>
break;<br>
}<br>
<br>
- case nir_intrinsic_load_subgroup_<wbr>all_mask:<br>
+ case nir_intrinsic_load_subgroup_<wbr>all_mask: {<br>
+ uint32_t mask = ~UINT32_C(0) >> (32 - dispatch_width);<br>
+ bld.MOV(retype(dest, BRW_REGISTER_TYPE_Q), brw_imm_d(mask));<br></blockquote><div><br></div><div>In SIMD32, you're going to get unintentional sign-extension here. I think you want UQ and ud.</div><div><br></div><div>--Jason<br></div><div> </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
+ break;<br>
+ }<br>
+<br>
case nir_intrinsic_load_subgroup_<wbr>eq_mask:<br>
case nir_intrinsic_load_subgroup_<wbr>ge_mask:<br>
case nir_intrinsic_load_subgroup_<wbr>gt_mask:<br>
<span class="HOEnZb"><font color="#888888">--<br>
2.9.5<br>
<br>
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</font></span></blockquote></div><br></div></div>