<div dir="ltr"><div class="gmail_extra"><div class="gmail_quote">On Tue, Oct 31, 2017 at 11:29 AM, Jason Ekstrand <span dir="ltr"><<a href="mailto:jason@jlekstrand.net" target="_blank">jason@jlekstrand.net</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr"><div class="gmail_extra"><div class="gmail_quote"><div><div class="h5">On Tue, Oct 31, 2017 at 10:55 AM, Neil Roberts <span dir="ltr"><<a href="mailto:nroberts@igalia.com" target="_blank">nroberts@igalia.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Instead of letting nir lower nir_intrinsic_load_subgroup_al<wbr>l_mask this<br>
is now generated directly. This is more efficient because it can be<br>
calculated in the compiler based on the dispatch width.<br>
<br>
Sadly it’s still not totally ideal because the constant doesn’t seem<br>
to get propagated and there is still a redundant MOV.<br></blockquote></div></div></div></div></div></blockquote><div><br></div><div>One of the patches in my subgroups series switches us over to using a constant exec width of 32 that is provided to the NIR lowering pass so this will become a non-issue.</div><div> <br></div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr"><div class="gmail_extra"><div class="gmail_quote"><div><div class="h5"><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
---<br>
src/intel/compiler/brw_compil<wbr>er.c | 2 +-<br>
src/intel/compiler/brw_fs_<wbr>nir.cpp | 7 ++++++-<br>
2 files changed, 7 insertions(+), 2 deletions(-)<br>
<br>
diff --git a/src/intel/compiler/brw_compi<wbr>ler.c b/src/intel/compiler/brw_compi<wbr>ler.c<br>
index 8df0d2e..f02fceb 100644<br>
--- a/src/intel/compiler/brw_compi<wbr>ler.c<br>
+++ b/src/intel/compiler/brw_compi<wbr>ler.c<br>
@@ -57,7 +57,7 @@ static const struct nir_shader_compiler_options scalar_nir_options = {<br>
.lower_unpack_snorm_4x8 = true,<br>
.lower_unpack_unorm_2x16 = true,<br>
.lower_unpack_unorm_4x8 = true,<br>
- .lower_subgroup_all_mask = true,<br>
+ .lower_subgroup_all_mask = false,<br>
.lower_subgroup_masks = true,<br>
.max_subgroup_size = 32,<br>
.max_unroll_iterations = 32,<br>
diff --git a/src/intel/compiler/brw_fs_ni<wbr>r.cpp b/src/intel/compiler/brw_fs_ni<wbr>r.cpp<br>
index 9202b0f..b73edc9 100644<br>
--- a/src/intel/compiler/brw_fs_ni<wbr>r.cpp<br>
+++ b/src/intel/compiler/brw_fs_ni<wbr>r.cpp<br>
@@ -4185,7 +4185,12 @@ fs_visitor::nir_emit_intrinsic<wbr>(const fs_builder &bld, nir_intrinsic_instr *instr<br>
break;<br>
}<br>
<br>
- case nir_intrinsic_load_subgroup_al<wbr>l_mask:<br>
+ case nir_intrinsic_load_subgroup_al<wbr>l_mask: {<br>
+ uint32_t mask = ~UINT32_C(0) >> (32 - dispatch_width);<br>
+ bld.MOV(retype(dest, BRW_REGISTER_TYPE_Q), brw_imm_d(mask));<br></blockquote><div><br></div></div></div><div>In SIMD32, you're going to get unintentional sign-extension here. I think you want UQ and ud.</div><span class="HOEnZb"><font color="#888888"><div><br></div><div>--Jason<br></div></font></span><span class=""><div> </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
+ break;<br>
+ }<br>
+<br>
case nir_intrinsic_load_subgroup_eq<wbr>_mask:<br>
case nir_intrinsic_load_subgroup_ge<wbr>_mask:<br>
case nir_intrinsic_load_subgroup_gt<wbr>_mask:<br>
<span class="m_3881427372037044315HOEnZb"><font color="#888888">--<br>
2.9.5<br>
<br>
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</font></span></blockquote></span></div><br></div></div>
</blockquote></div><br></div></div>