<div dir="ltr">rb<br></div><div class="gmail_extra"><br><div class="gmail_quote">On Fri, Jan 26, 2018 at 11:32 AM, Rafael Antognolli <span dir="ltr"><<a href="mailto:rafael.antognolli@intel.com" target="_blank">rafael.antognolli@intel.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">I got reviews and fixed the patches locally, but ended up merging the<br>
ones that I sent originally to the list. This patch fixes those<br>
mistakes.<br>
<br>
Fixes: 78c125af3904c539ea69bec2dd9fdf<wbr>7a5162854f<br>
Signed-off-by: Rafael Antognolli <<a href="mailto:rafael.antognolli@intel.com">rafael.antognolli@intel.com</a>><br>
Cc: Jason Ekstrand <<a href="mailto:jason@jlekstrand.net">jason@jlekstrand.net</a>><br>
---<br>
src/intel/vulkan/anv_private.h | 1 -<br>
src/intel/vulkan/genX_cmd_<wbr>buffer.c | 18 ++++++++++++------<br>
2 files changed, 12 insertions(+), 7 deletions(-)<br>
<br>
diff --git a/src/intel/vulkan/anv_<wbr>private.h b/src/intel/vulkan/anv_<wbr>private.h<br>
index 9d452de85e8..3cf37dd6bee 100644<br>
--- a/src/intel/vulkan/anv_<wbr>private.h<br>
+++ b/src/intel/vulkan/anv_<wbr>private.h<br>
@@ -1477,7 +1477,6 @@ enum anv_pipe_bits {<br>
ANV_PIPE_CONSTANT_CACHE_<wbr>INVALIDATE_BIT = (1 << 3),<br>
ANV_PIPE_VF_CACHE_INVALIDATE_<wbr>BIT = (1 << 4),<br>
ANV_PIPE_DATA_CACHE_FLUSH_BIT = (1 << 5),<br>
- ANV_PIPE_ISP_DISABLE_BIT = (1 << 9),<br>
ANV_PIPE_TEXTURE_CACHE_<wbr>INVALIDATE_BIT = (1 << 10),<br>
ANV_PIPE_INSTRUCTION_CACHE_<wbr>INVALIDATE_BIT = (1 << 11),<br>
ANV_PIPE_RENDER_TARGET_CACHE_<wbr>FLUSH_BIT = (1 << 12),<br>
diff --git a/src/intel/vulkan/genX_cmd_<wbr>buffer.c b/src/intel/vulkan/genX_cmd_<wbr>buffer.c<br>
index e8d44d0ad90..3691b4bdec9 100644<br>
--- a/src/intel/vulkan/genX_cmd_<wbr>buffer.c<br>
+++ b/src/intel/vulkan/genX_cmd_<wbr>buffer.c<br>
@@ -969,6 +969,15 @@ genX(BeginCommandBuffer)(<br>
if (cmd_buffer->level == VK_COMMAND_BUFFER_LEVEL_<wbr>PRIMARY)<br>
cmd_buffer->state.pending_<wbr>pipe_bits |= ANV_PIPE_VF_CACHE_INVALIDATE_<wbr>BIT;<br>
<br>
+ /* We send an "Indirect State Pointers Disable" packet at<br>
+ * EndCommandBuffer, so all push contant packets are ignored during a<br>
+ * context restore. Documentation says after that command, we need to<br>
+ * emit push constants again before any rendering operation. So we<br>
+ * flag them dirty here to make sure they get emitted.<br>
+ */<br>
+ if (GEN_GEN == 10)<br>
+ cmd_buffer->state.push_<wbr>constants_dirty |= VK_SHADER_STAGE_ALL_GRAPHICS;<br>
+<br>
VkResult result = VK_SUCCESS;<br>
if (cmd_buffer->usage_flags &<br>
VK_COMMAND_BUFFER_USAGE_<wbr>RENDER_PASS_CONTINUE_BIT) {<br>
@@ -1008,8 +1017,7 @@ genX(BeginCommandBuffer)(<br>
return result;<br>
}<br>
<br>
-/**<br>
- * From the PRM, Volume 2a:<br>
+/* From the PRM, Volume 2a:<br>
*<br>
* "Indirect State Pointers Disable<br>
*<br>
@@ -1039,16 +1047,14 @@ genX(BeginCommandBuffer)(<br>
* hardware to ignore previous 3DSTATE_CONSTANT_* packets during a<br>
* context restore, so the mentioned hang doesn't happen. However,<br>
* software must program push constant commands for all stages prior to<br>
- * rendering anything, so we flag them as dirty.<br>
+ * rendering anything. So we flag them dirty in BeginCommandBuffer.<br>
*/<br>
static void<br>
emit_isp_disable(struct anv_cmd_buffer *cmd_buffer)<br>
{<br>
anv_batch_emit(&cmd_buffer-><wbr>batch, GENX(PIPE_CONTROL), pc) {<br>
pc.<wbr>IndirectStatePointersDisable = true;<br>
- pc.PostSyncOperation = WriteImmediateData;<br>
- pc.Address =<br>
- (struct anv_address) { &cmd_buffer->device-><wbr>workaround_bo, 0 };<br>
+ pc.CommandStreamerStallEnable = true;<br>
}<br>
}<br>
<span class="HOEnZb"><font color="#888888"><br>
--<br>
2.14.3<br>
<br>
</font></span></blockquote></div><br></div>