<div dir="ltr">We don't always emit 0 for that SGPR. See radv_cs_emit_indirect_draw_packet.</div><div class="gmail_extra"> <div class="gmail_quote">On Mon, Jan 29, 2018 at 12:39 PM, Samuel Pitoiset <<a href="mailto:samuel.pitoiset@gmail.com" target="_blank">samuel.pitoiset@gmail.com</a>> wrote: <blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">We always emit 0 in there, just remove the allocated user SGPR and return a constant instead. This will free one SGPR for apps that need the draw ID. Signed-off-by: Samuel Pitoiset <<a href="mailto:samuel.pitoiset@gmail.com">samuel.pitoiset@gmail.com</a>> --- src/amd/common/ac_nir_to_llvm.c | 17 +++-------------- src/amd/vulkan/radv_cmd_buffer.c | 6 ++---- src/amd/vulkan/radv_pipeline.c | 4 ---- src/amd/vulkan/radv_private.h | 1 - 4 files changed, 5 insertions(+), 23 deletions(-) diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index b3336ffafe..47f62f42dc 100644 --- a/src/amd/common/ac_nir_to_llvm.c +++ b/src/amd/common/ac_nir_to_llvm.c @@ -571,11 +571,7 @@ static void allocate_user_sgprs(struct nir_to_llvm_context *ctx, case MESA_SHADER_VERTEX: if (!ctx->is_gs_copy_shader) { user_sgpr_info->sgpr_count += ctx->shader_info->info.vs.has_vertex_buffers ? 2 : 0; - if (ctx->shader_info->info.vs.needs_draw_id) { - user_sgpr_info->sgpr_count += 3; - } else { - user_sgpr_info->sgpr_count += 2; - } + user_sgpr_info->sgpr_count += 2; } if (ctx->options->key.vs.as_ls) user_sgpr_info->sgpr_count++; @@ -661,9 +657,6 @@ declare_vs_specific_input_sgprs(struct nir_to_llvm_context *ctx, } add_arg(args, ARG_SGPR, ctx->ac.i32, &ctx->abi.base_vertex); add_arg(args, ARG_SGPR, ctx->ac.i32, &ctx->abi.start_instance); - if (ctx->shader_info->info.vs.needs_draw_id) { - add_arg(args, ARG_SGPR, ctx->ac.i32, &ctx->abi.draw_id); - } } } @@ -749,12 +742,8 @@ set_vs_specific_input_locs(struct nir_to_llvm_context *ctx, user_sgpr_idx, 2); } - unsigned vs_num = 2; - if (ctx->shader_info->info.vs.needs_draw_id) - vs_num++; - set_loc_shader(ctx, AC_UD_VS_BASE_VERTEX_START_INSTANCE, - user_sgpr_idx, vs_num); + user_sgpr_idx, 2); } } @@ -4332,7 +4321,7 @@ static void visit_intrinsic(struct ac_nir_context *ctx, result = ctx->abi->start_instance; break; case nir_intrinsic_load_draw_id: - result = ctx->abi->draw_id; + result = ctx->abi->draw_id ? ctx->abi->draw_id : ctx->ac.i32_0; break; case nir_intrinsic_load_view_index: result = ctx->nctx->view_index ? ctx->nctx->view_index : ctx->ac.i32_0; diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index b694174de6..e347c3f563 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -3360,13 +3360,11 @@ radv_emit_draw_packets(struct radv_cmd_buffer *cmd_buffer, if (info->vertex_offset != state->last_vertex_offset || info->first_instance != state->last_first_instance) { - radeon_set_sh_reg_seq(cs, state->pipeline->graphics.vtx_base_sgpr, - state->pipeline->graphics.vtx_emit_num); + radeon_set_sh_reg_seq(cs, state->pipeline->graphics.vtx_base_sgpr, 2); radeon_emit(cs, info->vertex_offset); radeon_emit(cs, info->first_instance); - if (state->pipeline->graphics.vtx_emit_num == 3) - radeon_emit(cs, 0); + state->last_first_instance = info->first_instance; state->last_vertex_offset = info->vertex_offset; } diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index 589e49a813..a3ba6ee3aa 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd/vulkan/radv_pipeline.c @@ -2691,10 +2691,6 @@ radv_pipeline_init(struct radv_pipeline *pipeline, if (loc->sgpr_idx != -1) { pipeline->graphics.vtx_base_sgpr = pipeline->user_data_0[MESA_SHADER_VERTEX]; pipeline->graphics.vtx_base_sgpr += loc->sgpr_idx * 4; - if (radv_get_vertex_shader(pipeline)->info.info.vs.needs_draw_id) - pipeline->graphics.vtx_emit_num = 3; - else - pipeline->graphics.vtx_emit_num = 2; } pipeline->graphics.vtx_reuse_depth = 30; diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h index f650b9a360..7ad0c3baa8 100644 --- a/src/amd/vulkan/radv_private.h +++ b/src/amd/vulkan/radv_private.h @@ -1257,7 +1257,6 @@ struct radv_pipeline { bool wd_switch_on_eop; bool ia_switch_on_eoi; bool partial_vs_wave; - uint8_t vtx_emit_num; uint32_t vtx_reuse_depth; struct radv_prim_vertex_count prim_vertex_count; bool can_use_guardband; -- 2.16.1 _______________________________________________ mesa-dev mailing list <a href="mailto:mesa-dev@lists.freedesktop.org">mesa-dev@lists.freedesktop.org</a> <a href="https://lists.freedesktop.org/mailman/listinfo/mesa-dev" rel="noreferrer" target="_blank">https://lists.freedesktop.org/mailman/listinfo/mesa-dev</a> </blockquote></div> </div>