<div dir="ltr"><div class="gmail_extra"><div class="gmail_quote">On Fri, Jan 12, 2018 at 2:45 PM, Nanley Chery <span dir="ltr"><<a href="mailto:nanleychery@gmail.com" target="_blank">nanleychery@gmail.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><span class="">On Mon, Nov 27, 2017 at 07:06:09PM -0800, Jason Ekstrand wrote:<br>
</span><div><div class="h5">> ---<br>
> src/intel/vulkan/anv_blorp.c | 243 ++++++++++++++++--------------<wbr>-------<br>
> src/intel/vulkan/anv_private.h | 17 ++-<br>
> src/intel/vulkan/genX_cmd_<wbr>buffer.c | 68 ++++++++++-<br>
> 3 files changed, 188 insertions(+), 140 deletions(-)<br>
><br>
> diff --git a/src/intel/vulkan/anv_blorp.c b/src/intel/vulkan/anv_blorp.c<br>
> index 7401234..45d7b12 100644<br>
> --- a/src/intel/vulkan/anv_blorp.c<br>
> +++ b/src/intel/vulkan/anv_blorp.c<br>
> @@ -1132,143 +1132,6 @@ enum subpass_stage {<br>
> SUBPASS_STAGE_RESOLVE,<br>
> };<br>
><br>
> -static bool<br>
> -subpass_needs_clear(const struct anv_cmd_buffer *cmd_buffer)<br>
> -{<br>
> - const struct anv_cmd_state *cmd_state = &cmd_buffer->state;<br>
> - uint32_t ds = cmd_state->subpass->depth_<wbr>stencil_attachment.attachment;<br>
> -<br>
> - if (ds != VK_ATTACHMENT_UNUSED) {<br>
> - assert(ds < cmd_state->pass->attachment_<wbr>count);<br>
> - if (cmd_state->attachments[ds].<wbr>pending_clear_aspects)<br>
> - return true;<br>
> - }<br>
> -<br>
> - return false;<br>
> -}<br>
> -<br>
> -void<br>
> -anv_cmd_buffer_clear_subpass(<wbr>struct anv_cmd_buffer *cmd_buffer)<br>
> -{<br>
> - const struct anv_cmd_state *cmd_state = &cmd_buffer->state;<br>
> - const VkRect2D render_area = cmd_buffer->state.render_area;<br>
> -<br>
> -<br>
> - if (!subpass_needs_clear(cmd_<wbr>buffer))<br>
> - return;<br>
> -<br>
> - /* Because this gets called within a render pass, we tell blorp not to<br>
> - * trash our depth and stencil buffers.<br>
> - */<br>
> - struct blorp_batch batch;<br>
> - blorp_batch_init(&cmd_buffer-><wbr>device->blorp, &batch, cmd_buffer,<br>
> - BLORP_BATCH_NO_EMIT_DEPTH_<wbr>STENCIL);<br>
> -<br>
> - VkClearRect clear_rect = {<br>
> - .rect = cmd_buffer->state.render_area,<br>
> - .baseArrayLayer = 0,<br>
> - .layerCount = cmd_buffer->state.framebuffer-<wbr>>layers,<br>
> - };<br>
> -<br>
> - struct anv_framebuffer *fb = cmd_buffer->state.framebuffer;<br>
> -<br>
> - const uint32_t ds = cmd_state->subpass->depth_<wbr>stencil_attachment.attachment;<br>
> - assert(ds == VK_ATTACHMENT_UNUSED || ds < cmd_state->pass->attachment_<wbr>count);<br>
> -<br>
> - if (ds != VK_ATTACHMENT_UNUSED &&<br>
> - cmd_state->attachments[ds].<wbr>pending_clear_aspects) {<br>
> -<br>
> - VkClearAttachment clear_att = {<br>
> - .aspectMask = cmd_state->attachments[ds].<wbr>pending_clear_aspects,<br>
> - .clearValue = cmd_state->attachments[ds].<wbr>clear_value,<br>
> - };<br>
> -<br>
> -<br>
> - const uint8_t gen = cmd_buffer->device->info.gen;<br>
> - bool clear_with_hiz = gen >= 8 && cmd_state->attachments[ds].<wbr>aux_usage ==<br>
> - ISL_AUX_USAGE_HIZ;<br>
> - const struct anv_image_view *iview = fb->attachments[ds];<br>
> -<br>
> - if (clear_with_hiz) {<br>
> - const bool clear_depth = clear_att.aspectMask &<br>
> - VK_IMAGE_ASPECT_DEPTH_BIT;<br>
> - const bool clear_stencil = clear_att.aspectMask &<br>
> - VK_IMAGE_ASPECT_STENCIL_BIT;<br>
> -<br>
> - /* Check against restrictions for depth buffer clearing. A great GPU<br>
> - * performance benefit isn't expected when using the HZ sequence for<br>
> - * stencil-only clears. Therefore, we don't emit a HZ op sequence for<br>
> - * a stencil clear in addition to using the BLORP-fallback for depth.<br>
> - */<br>
> - if (clear_depth) {<br>
> - if (!blorp_can_hiz_clear_depth(<wbr>gen, iview->planes[0].isl.format,<br>
> - iview->image->samples,<br>
> - render_area.offset.x,<br>
> - render_area.offset.y,<br>
> - render_area.offset.x +<br>
> - render_area.extent.width,<br>
> - render_area.offset.y +<br>
> - render_area.extent.height)) {<br>
> - clear_with_hiz = false;<br>
> - } else if (clear_att.clearValue.<wbr>depthStencil.depth !=<br>
> - ANV_HZ_FC_VAL) {<br>
> - /* Don't enable fast depth clears for any color not equal to<br>
> - * ANV_HZ_FC_VAL.<br>
> - */<br>
> - clear_with_hiz = false;<br>
> - } else if (gen == 8 &&<br>
> - anv_can_sample_with_hiz(&cmd_<wbr>buffer->device->info,<br>
> - iview->image)) {<br>
> - /* Only gen9+ supports returning ANV_HZ_FC_VAL when sampling a<br>
> - * fast-cleared portion of a HiZ buffer. Testing has revealed<br>
> - * that Gen8 only supports returning 0.0f. Gens prior to gen8 do<br>
> - * not support this feature at all.<br>
> - */<br>
> - clear_with_hiz = false;<br>
> - }<br>
> - }<br>
> -<br>
> - if (clear_with_hiz) {<br>
> - blorp_gen8_hiz_clear_<wbr>attachments(&batch, iview->image->samples,<br>
> - render_area.offset.x,<br>
> - render_area.offset.y,<br>
> - render_area.offset.x +<br>
> - render_area.extent.width,<br>
> - render_area.offset.y +<br>
> - render_area.extent.height,<br>
> - clear_depth, clear_stencil,<br>
> - clear_att.clearValue.<br>
> - depthStencil.stencil);<br>
> -<br>
> - /* From the SKL PRM, Depth Buffer Clear:<br>
> - *<br>
> - * Depth Buffer Clear Workaround<br>
> - * Depth buffer clear pass using any of the methods (WM_STATE,<br>
> - * 3DSTATE_WM or 3DSTATE_WM_HZ_OP) must be followed by a<br>
> - * PIPE_CONTROL command with DEPTH_STALL bit and Depth FLUSH bits<br>
> - * “set” before starting to render. DepthStall and DepthFlush are<br>
> - * not needed between consecutive depth clear passes nor is it<br>
> - * required if the depth-clear pass was done with “full_surf_clear”<br>
> - * bit set in the 3DSTATE_WM_HZ_OP.<br>
> - */<br>
> - if (clear_depth) {<br>
> - cmd_buffer->state.pending_<wbr>pipe_bits |=<br>
> - ANV_PIPE_DEPTH_CACHE_FLUSH_BIT | ANV_PIPE_DEPTH_STALL_BIT;<br>
> - }<br>
> - }<br>
> - }<br>
> -<br>
> - if (!clear_with_hiz) {<br>
> - clear_depth_stencil_<wbr>attachment(cmd_buffer, &batch,<br>
> - &clear_att, 1, &clear_rect);<br>
> - }<br>
> -<br>
> - cmd_state->attachments[ds].<wbr>pending_clear_aspects = 0;<br>
> - }<br>
> -<br>
> - blorp_batch_finish(&batch);<br>
> -}<br>
> -<br>
> static void<br>
> resolve_surface(struct blorp_batch *batch,<br>
> struct blorp_surf *src_surf,<br>
> @@ -1568,6 +1431,53 @@ anv_image_clear_color(struct anv_cmd_buffer *cmd_buffer,<br>
> }<br>
><br>
> void<br>
> +anv_image_clear_depth_<wbr>stencil(struct anv_cmd_buffer *cmd_buffer,<br>
> + const struct anv_image *image,<br>
> + VkImageAspectFlags aspects,<br>
> + enum isl_aux_usage depth_aux_usage,<br>
> + uint32_t level,<br>
> + uint32_t base_layer, uint32_t layer_count,<br>
> + VkRect2D area,<br>
> + float depth_value, uint8_t stencil_value)<br>
> +{<br>
> + assert(aspects & (VK_IMAGE_ASPECT_DEPTH_BIT |<br>
> + VK_IMAGE_ASPECT_STENCIL_BIT));<br>
> +<br>
> + struct blorp_batch batch;<br>
> + blorp_batch_init(&cmd_buffer-><wbr>device->blorp, &batch, cmd_buffer, 0);<br>
> +<br>
> + struct blorp_surf depth, stencil;<br>
> + if (image->aspects & VK_IMAGE_ASPECT_DEPTH_BIT) {<br>
<br>
</div></div>Why use image->aspects instead of aspects?<br>
<span class=""><br>
> + get_blorp_surf_for_anv_image(<wbr>cmd_buffer->device,<br>
> + image, VK_IMAGE_ASPECT_DEPTH_BIT,<br>
> + depth_aux_usage, &depth);<br>
> + depth.clear_color.f32[0] = ANV_HZ_FC_VAL;<br>
> + } else {<br>
> + memset(&stencil, 0, sizeof(stencil));<br>
<br>
</span>The depth blorp_surf should be memset here.<br><div><div class="h5"></div></div></blockquote><div><br></div><div>Fixed. See reply to Topi<br></div><div> </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div><div class="h5">
> + }<br>
> +<br>
> + if (image->aspects & VK_IMAGE_ASPECT_STENCIL_BIT) {<br>
> + get_blorp_surf_for_anv_image(<wbr>cmd_buffer->device,<br>
> + image, VK_IMAGE_ASPECT_STENCIL_BIT,<br>
> + ISL_AUX_USAGE_NONE, &stencil);<br>
> + } else {<br>
> + memset(&stencil, 0, sizeof(stencil));<br>
> + }<br>
> +<br>
> + blorp_clear_depth_stencil(&<wbr>batch, &depth, &stencil,<br>
> + level, base_layer, layer_count,<br>
> + area.offset.x, area.offset.y,<br>
> + area.offset.x + area.extent.width,<br>
> + area.offset.y + area.extent.height,<br>
> + aspects & VK_IMAGE_ASPECT_DEPTH_BIT,<br>
> + depth_value,<br>
> + (aspects & VK_IMAGE_ASPECT_STENCIL_BIT) ? 0xff : 0,<br>
> + stencil_value);<br>
> +<br>
> + blorp_batch_finish(&batch);<br>
> +}<br>
> +<br>
> +void<br>
> anv_image_hiz_op(struct anv_cmd_buffer *cmd_buffer,<br>
> const struct anv_image *image,<br>
> VkImageAspectFlagBits aspect, uint32_t level,<br>
> @@ -1595,6 +1505,65 @@ anv_image_hiz_op(struct anv_cmd_buffer *cmd_buffer,<br>
> }<br>
><br>
> void<br>
> +anv_image_hiz_clear(struct anv_cmd_buffer *cmd_buffer,<br>
> + const struct anv_image *image,<br>
> + VkImageAspectFlags aspects,<br>
> + uint32_t level,<br>
> + uint32_t base_layer, uint32_t layer_count,<br>
> + VkRect2D area, uint8_t stencil_value)<br>
> +{<br>
> + assert(aspects & (VK_IMAGE_ASPECT_DEPTH_BIT |<br>
> + VK_IMAGE_ASPECT_STENCIL_BIT));<br>
> + assert(base_layer + layer_count <=<br>
> + anv_image_aux_layers(image, VK_IMAGE_ASPECT_DEPTH_BIT, 0));<br>
> +<br>
> + struct blorp_batch batch;<br>
> + blorp_batch_init(&cmd_buffer-><wbr>device->blorp, &batch, cmd_buffer, 0);<br>
> +<br>
> + struct blorp_surf depth;<br>
> + get_blorp_surf_for_anv_image(<wbr>cmd_buffer->device,<br>
> + image, VK_IMAGE_ASPECT_DEPTH_BIT,<br>
> + ISL_AUX_USAGE_HIZ, &depth);<br>
<br>
</div></div>Shouldn't we check if aspects contains depth before calling this?<span class=""><br></span></blockquote><div><br></div><div>This is a HiZ clear. We had better have depth. I'll adjust the assert at the top.<br></div><div> </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><span class="">
> + depth.clear_color.f32[0] = ANV_HZ_FC_VAL;<br>
> +<br>
> + struct blorp_surf stencil;<br>
> + if (image->aspects & VK_IMAGE_ASPECT_STENCIL_BIT) {<br>
<br>
</span>Why use image->aspects instead of aspects?<br><div><div class="h5"></div></div></blockquote><div><br></div><div>No good reason. I'll change to aspects.<br></div><div> </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div><div class="h5">
> + get_blorp_surf_for_anv_image(<wbr>cmd_buffer->device,<br>
> + image, VK_IMAGE_ASPECT_STENCIL_BIT,<br>
> + ISL_AUX_USAGE_NONE, &stencil);<br>
> + } else {<br>
> + memset(&stencil, 0, sizeof(stencil));<br>
> + }<br>
> +<br>
> + blorp_hiz_clear_depth_stencil(<wbr>&batch, &depth, &stencil,<br>
> + level, base_layer, layer_count,<br>
> + area.offset.x, area.offset.y,<br>
> + area.offset.x + area.extent.width,<br>
> + area.offset.y + area.extent.height,<br>
> + aspects & VK_IMAGE_ASPECT_DEPTH_BIT,<br>
> + ANV_HZ_FC_VAL,<br>
> + aspects & VK_IMAGE_ASPECT_STENCIL_BIT,<br>
> + stencil_value);<br>
> +<br>
> + blorp_batch_finish(&batch);<br>
> +<br>
> + /* From the SKL PRM, Depth Buffer Clear:<br>
> + *<br>
> + * Depth Buffer Clear Workaround<br>
> + * Depth buffer clear pass using any of the methods (WM_STATE, 3DSTATE_WM<br>
> + * or 3DSTATE_WM_HZ_OP) must be followed by a PIPE_CONTROL command with<br>
> + * DEPTH_STALL bit and Depth FLUSH bits “set” before starting to render.<br>
> + * DepthStall and DepthFlush are not needed between consecutive depth clear<br>
> + * passes nor is it required if the depth-clear pass was done with<br>
> + * “full_surf_clear” bit set in the 3DSTATE_WM_HZ_OP.<br>
> + */<br>
> + if (aspects & VK_IMAGE_ASPECT_DEPTH_BIT) {<br>
> + cmd_buffer->state.pending_<wbr>pipe_bits |=<br>
> + ANV_PIPE_DEPTH_CACHE_FLUSH_BIT | ANV_PIPE_DEPTH_STALL_BIT;<br>
> + }<br>
> +}<br>
> +<br>
> +void<br>
> anv_image_mcs_op(struct anv_cmd_buffer *cmd_buffer,<br>
> const struct anv_image *image,<br>
> VkImageAspectFlagBits aspect,<br>
> diff --git a/src/intel/vulkan/anv_<wbr>private.h b/src/intel/vulkan/anv_<wbr>private.h<br>
> index bc355bb..b881157 100644<br>
> --- a/src/intel/vulkan/anv_<wbr>private.h<br>
> +++ b/src/intel/vulkan/anv_<wbr>private.h<br>
> @@ -1875,7 +1875,6 @@ anv_cmd_buffer_push_constants(<wbr>struct anv_cmd_buffer *cmd_buffer,<br>
> struct anv_state<br>
> anv_cmd_buffer_cs_push_<wbr>constants(struct anv_cmd_buffer *cmd_buffer);<br>
><br>
> -void anv_cmd_buffer_clear_subpass(<wbr>struct anv_cmd_buffer *cmd_buffer);<br>
> void anv_cmd_buffer_resolve_<wbr>subpass(struct anv_cmd_buffer *cmd_buffer);<br>
><br>
> const struct anv_image_view *<br>
> @@ -2545,12 +2544,28 @@ anv_image_clear_color(struct anv_cmd_buffer *cmd_buffer,<br>
> uint32_t level, uint32_t base_layer, uint32_t layer_count,<br>
> VkRect2D area, union isl_color_value clear_color);<br>
> void<br>
> +anv_image_clear_depth_<wbr>stencil(struct anv_cmd_buffer *cmd_buffer,<br>
> + const struct anv_image *image,<br>
> + VkImageAspectFlags aspects,<br>
> + enum isl_aux_usage depth_aux_usage,<br>
> + uint32_t level,<br>
> + uint32_t base_layer, uint32_t layer_count,<br>
> + VkRect2D area,<br>
> + float depth_value, uint8_t stencil_value);<br>
> +void<br>
> anv_image_hiz_op(struct anv_cmd_buffer *cmd_buffer,<br>
> const struct anv_image *image,<br>
> VkImageAspectFlagBits aspect, uint32_t level,<br>
> uint32_t base_layer, uint32_t layer_count,<br>
> enum isl_aux_op hiz_op);<br>
> void<br>
> +anv_image_hiz_clear(struct anv_cmd_buffer *cmd_buffer,<br>
> + const struct anv_image *image,<br>
> + VkImageAspectFlags aspects,<br>
> + uint32_t level,<br>
> + uint32_t base_layer, uint32_t layer_count,<br>
> + VkRect2D area, uint8_t stencil_value);<br>
> +void<br>
> anv_image_mcs_op(struct anv_cmd_buffer *cmd_buffer,<br>
> const struct anv_image *image,<br>
> VkImageAspectFlagBits aspect,<br>
> diff --git a/src/intel/vulkan/genX_cmd_<wbr>buffer.c b/src/intel/vulkan/genX_cmd_<wbr>buffer.c<br>
> index 265ae44..57685bd 100644<br>
> --- a/src/intel/vulkan/genX_cmd_<wbr>buffer.c<br>
> +++ b/src/intel/vulkan/genX_cmd_<wbr>buffer.c<br>
> @@ -3216,9 +3216,73 @@ cmd_buffer_begin_subpass(<wbr>struct anv_cmd_buffer *cmd_buffer,<br>
> att_state->pending_clear_<wbr>aspects = 0;<br>
> }<br>
><br>
> - cmd_buffer_emit_depth_stencil(<wbr>cmd_buffer);<br>
> + if (subpass->depth_stencil_<wbr>attachment.attachment != VK_ATTACHMENT_UNUSED) {<br>
> + const uint32_t a = subpass->depth_stencil_<wbr>attachment.attachment;<br>
> +<br>
> + assert(a < cmd_state->pass->attachment_<wbr>count);<br>
> + struct anv_attachment_state *att_state = &cmd_state->attachments[a];<br>
> + struct anv_image_view *iview = fb->attachments[a];<br>
> + const struct anv_image *image = iview->image;<br>
> +<br>
> + assert(image->aspects & (VK_IMAGE_ASPECT_DEPTH_BIT |<br>
> + VK_IMAGE_ASPECT_STENCIL_BIT));<br>
> +<br>
> + if (att_state->pending_clear_<wbr>aspects) {<br>
> + bool clear_with_hiz = att_state->aux_usage == ISL_AUX_USAGE_HIZ;<br>
> + if (clear_with_hiz &&<br>
> + (att_state->pending_clear_<wbr>aspects & VK_IMAGE_ASPECT_DEPTH_BIT)) {<br>
> + if (!blorp_can_hiz_clear_depth(<wbr>GEN_GEN,<br>
> + iview->planes[0].isl.format,<br>
> + iview->image->samples,<br>
> + render_area.offset.x,<br>
> + render_area.offset.y,<br>
> + render_area.offset.x +<br>
> + render_area.extent.width,<br>
> + render_area.offset.y +<br>
> + render_area.extent.height)) {<br>
<br>
</div></div>If GEN_GEN < 8, the first assert within the above function will be<br>
triggered. The original code checks the gen when assigning<br>
clear_with_hiz.<span class=""><br></span></blockquote><div><br></div><div>I know I had myself convinced at one point that I could drop the GEN_GEN >= 8 but I don't remember now why. I'll add it back in. If nothing else, it'll let the compiler dead-code some stuff on HSW.<br></div><div> </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><span class="">
> + clear_with_hiz = false;<br>
> + } else if (att_state->clear_value.<wbr>depthStencil.depth != ANV_HZ_FC_VAL) {<br>
> + clear_with_hiz = false;<br>
> + } else if (GEN_GEN == 8 &&<br>
> + anv_can_sample_with_hiz(&cmd_<wbr>buffer->device->info,<br>
> + iview->image)) {<br>
> + /* Only gen9+ supports returning ANV_HZ_FC_VAL when sampling a<br>
> + * fast-cleared portion of a HiZ buffer. Testing has revealed<br>
> + * that Gen8 only supports returning 0.0f. Gens prior to gen8<br>
> + * do not support this feature at all.<br>
> + */<br>
> + clear_with_hiz = false;<br>
> + }<br>
> + }<br>
><br>
> - anv_cmd_buffer_clear_subpass(<wbr>cmd_buffer);<br>
> + if (clear_with_hiz) {<br>
> + /* We currently only support HiZ for single-layer images */<br>
</span> ^<br>
"and single-level" ?<br>
<span class=""><br>
> + assert(iview->planes[0].isl.<wbr>base_level == 0);<br>
> + assert(iview->planes[0].isl.<wbr>base_array_layer == 0);<br>
> + assert(fb->layers == 1);<br>
> +<br>
> + anv_image_hiz_clear(cmd_<wbr>buffer, image,<br>
> + att_state->pending_clear_<wbr>aspects,<br>
> + iview->planes[0].isl.base_<wbr>level,<br>
> + iview->planes[0].isl.base_<wbr>array_layer,<br>
> + fb->layers, render_area,<br>
> + att_state->clear_value.<wbr>depthStencil.stencil);<br>
> + } else {<br>
> + anv_image_clear_depth_stencil(<wbr>cmd_buffer, image,<br>
> + att_state->pending_clear_<wbr>aspects,<br>
> + att_state->aux_usage,<br>
> + iview->planes[0].isl.base_<wbr>level,<br>
> + iview->planes[0].isl.base_<wbr>array_layer,<br>
> + fb->layers, render_area,<br>
> + att_state->clear_value.<wbr>depthStencil.depth,<br>
> + att_state->clear_value.<wbr>depthStencil.stencil);<br>
<br>
</span>Do we need to do something special for multiview? I need to spend<br>
some time getting familiar with that extension...<span class="im HOEnZb"><br></span></blockquote><div><br></div><div>Yes. The igalia people have a bunch of multiview clear fixes. I asked them to hold off and rebase on this rework.<br></div><div> </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><span class="im HOEnZb">
> + }<br>
> + }<br>
> +<br>
> + att_state->pending_clear_<wbr>aspects = 0;<br>
> + }<br>
> +<br>
> + cmd_buffer_emit_depth_stencil(<wbr>cmd_buffer);<br>
> }<br>
><br>
> static void<br>
> --<br>
> 2.5.0.400.gff86faf<br>
><br>
</span><div class="HOEnZb"><div class="h5">> ______________________________<wbr>_________________<br>
> mesa-dev mailing list<br>
> <a href="mailto:mesa-dev@lists.freedesktop.org">mesa-dev@lists.freedesktop.org</a><br>
> <a href="https://lists.freedesktop.org/mailman/listinfo/mesa-dev" rel="noreferrer" target="_blank">https://lists.freedesktop.org/<wbr>mailman/listinfo/mesa-dev</a><br>
</div></div></blockquote></div><br></div></div>