<div dir="ltr"><div class="gmail_extra"><div class="gmail_quote">On Wed, Feb 21, 2018 at 1:45 PM, Rafael Antognolli <span dir="ltr"><<a href="mailto:rafael.antognolli@intel.com" target="_blank">rafael.antognolli@intel.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">The size of the clear color struct (expected by the hardware) is 8<br>
dwords (isl_dev.ss.clear_value_state_<wbr>size here). But we still need to<br>
track the size of the clear color, used when memcopying it to/from the<br>
state buffer. For that we keep isl_dev.ss.clear_value_size.<br>
<br>
Signed-off-by: Rafael Antognolli <<a href="mailto:rafael.antognolli@intel.com" target="_blank">rafael.antognolli@intel.com</a>><br>
---<br>
src/intel/genxml/gen10.xml | 8 ++++++++<br>
src/intel/isl/isl.c | 4 +++-<br>
src/intel/isl/isl.h | 5 +++++<br>
src/intel/vulkan/anv_image.c | 2 +-<br>
src/intel/vulkan/anv_private.<wbr>h | 2 +-<br>
5 files changed, 18 insertions(+), 3 deletions(-)<br>
<br>
diff --git a/src/intel/genxml/gen10.xml b/src/intel/genxml/gen10.xml<br>
index b434d1b0f66..58b83954c4c 100644<br>
--- a/src/intel/genxml/gen10.xml<br>
+++ b/src/intel/genxml/gen10.xml<br></blockquote><div><br></div><div>We need gen11 as well<br></div><div> </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
@@ -809,6 +809,14 @@<br>
<field name="Alpha Clear Color" start="480" end="511" type="int"/><br>
</struct><br>
<br>
+ <struct name="CLEAR_COLOR" length="8"><br>
+ <field name="Raw Clear Color Red" start="0" end="31" type="int"/><br>
+ <field name="Raw Clear Color Green" start="32" end="63" type="int"/><br>
+ <field name="Raw Clear Color Blue" start="64" end="95" type="int"/><br>
+ <field name="Raw Clear Color Alpha" start="96" end="127" type="int"/><br></blockquote><div><br></div><div>Might be good to put Converted Clear Value Hi/Low in here as well.<br></div><div> </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
+ <!-- Reserved - MBZ --><br>
+ </struct><br>
+<br>
<struct name="SAMPLER_INDIRECT_STATE_B<wbr>ORDER_COLOR" length="4"><br>
<field name="Border Color Red As S31" start="0" end="31" type="int"/><br>
<field name="Border Color Red As U32" start="0" end="31" type="uint"/><br>
diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c<br>
index 77641a89f86..e94470362e2 100644<br>
--- a/src/intel/isl/isl.c<br>
+++ b/src/intel/isl/isl.c<br>
@@ -79,9 +79,10 @@ isl_device_init(struct isl_device *dev,<br>
* - 2 dwords that can be used by the hardware for converted clear color<br>
* + some extra bits.<br>
*/<br>
- dev->ss.clear_value_size = 8 * 4;<br>
+ dev->ss.clear_value_size = 4 * 4;<br>
dev->ss.clear_value_offset =<br>
RENDER_SURFACE_STATE_ClearValu<wbr>eAddress_start(info) / 32 * 4;<br>
+ dev->ss.clear_value_state_size = CLEAR_COLOR_length(info) * 4;<br>
} else {<br>
dev->ss.clear_value_size =<br>
isl_align(RENDER_SURFACE_STATE<wbr>_RedClearColor_bits(info) +<br>
@@ -90,6 +91,7 @@ isl_device_init(struct isl_device *dev,<br>
RENDER_SURFACE_STATE_AlphaClea<wbr>rColor_bits(info), 32) / 8;<br>
dev->ss.clear_value_offset =<br>
RENDER_SURFACE_STATE_RedClearC<wbr>olor_start(info) / 32 * 4;<br>
+ dev->ss.clear_value_state_size = dev->ss.clear_value_size;<br></blockquote><div><br></div><div>Ugh... Let's just make these two separate things. clear_value_size will be 4 * 4 on gen9-10 and clear_color_state_size will be 8*4 on gen10+<br><br></div><div>I think this means dropping the previous patch entirely and just making this patch add a size field.<br></div><div> </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
}<br>
assert(RENDER_SURFACE_STATE_Su<wbr>rfaceBaseAddress_start(info) % 8 == 0);<br>
dev->ss.addr_offset =<br>
diff --git a/src/intel/isl/isl.h b/src/intel/isl/isl.h<br>
index 209769a9a99..f1b38efed44 100644<br>
--- a/src/intel/isl/isl.h<br>
+++ b/src/intel/isl/isl.h<br>
@@ -963,6 +963,11 @@ struct isl_device {<br>
uint8_t aux_addr_offset;<br>
<br>
/* Rounded up to the nearest dword to simplify GPU memcpy operations. */<br>
+<br>
+ /* size of the state buffer used to store the clear value + extra<br>
+ * additional space used by the hardware */<br>
+ uint8_t clear_value_state_size;<br></blockquote><div><br></div><div>Maybe call this clear_color_state_size since it is the size of the CLEAR_COLOR state.<br></div><div> </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
+ /* size of the clear color itself - used to copy it to/from a BO */<br>
uint8_t clear_value_size;<br>
uint8_t clear_value_offset;<br>
} ss;<br>
diff --git a/src/intel/vulkan/anv_image.c b/src/intel/vulkan/anv_image.c<br>
index a0aee43bd21..0dafe03442d 100644<br>
--- a/src/intel/vulkan/anv_image.c<br>
+++ b/src/intel/vulkan/anv_image.c<br>
@@ -264,7 +264,7 @@ add_aux_state_tracking_buffer(<wbr>struct anv_image *image,<br>
}<br>
<br>
/* Clear color and fast clear type */<br>
- unsigned state_size = device->isl_dev.ss.clear_value<wbr>_size + 4;<br>
+ unsigned state_size = device->isl_dev.ss.clear_value<wbr>_state_size + 4;<br>
<br>
/* We only need to track compression on CCS_E surfaces. */<br>
if (image->planes[plane].aux_usag<wbr>e == ISL_AUX_USAGE_CCS_E) {<br>
diff --git a/src/intel/vulkan/anv_private<wbr>.h b/src/intel/vulkan/anv_private<wbr>.h<br>
index 37e63f56aa0..b8c381d2665 100644<br>
--- a/src/intel/vulkan/anv_private<wbr>.h<br>
+++ b/src/intel/vulkan/anv_private<wbr>.h<br>
@@ -2566,7 +2566,7 @@ anv_image_get_fast_clear_type_<wbr>addr(const struct anv_device *device,<br>
{<br>
struct anv_address addr =<br>
anv_image_get_clear_color_add<wbr>r(device, image, aspect);<br>
- addr.offset += device->isl_dev.ss.clear_value<wbr>_size;<br>
+ addr.offset += device->isl_dev.ss.clear_value<wbr>_state_size;<br>
return addr;<br>
}<br>
<span class="m_1791064366050296898HOEnZb"><font color="#888888"><br>
--<br>
2.14.3<br>
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