<div dir="ltr"><div><div>The first 5 are </div>Reviewed-by: Jason Ekstrand <<a href="mailto:jason@jlekstrand.net">jason@jlekstrand.net</a>> </div>I meant to just skim and ACK the Vulkan bits but then I did a full review. Oh, well. :-) </div><div class="gmail_extra"> <div class="gmail_quote">On Fri, Apr 6, 2018 at 2:53 PM, Ian Romanick <<a href="mailto:idr@freedesktop.org" target="_blank">idr@freedesktop.org</a>> wrote: <blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">From: Neil Roberts <<a href="mailto:nroberts@igalia.com">nroberts@igalia.com</a>> base_vertex will be zero for non-indexed calls and in that case we need vertex_id to be offset by the ‘first’ parameter instead. That is what we get with first_vertex. This is true for both GL and Vulkan. The freedreno driver is also setting vertex_id_zero_based on nir_options. In order to avoid breakage this patch switches the relevant code to handle SYSTEM_VALUE_FIRST_VERTEX so that it can retain the same behavior. v2: change a3xx/fd3_emit.c and a4xx/fd4_emit.c from SYSTEM_VALUE_BASE_VERTEX to SYSTEM_VALUE_FIRST_VERTEX (Kenneth). Reviewed-by: Ian Romanick <<a href="mailto:ian.d.romanick@intel.com">ian.d.romanick@intel.com</a>> Cc: Rob Clark <<a href="mailto:robdclark@gmail.com">robdclark@gmail.com</a>> Acked-by: Marek Olšák <<a href="mailto:marek.olsak@amd.com">marek.olsak@amd.com</a>> --- src/compiler/nir/nir_lower_system_values.c | 2 +- src/gallium/drivers/freedreno/a3xx/fd3_emit.c | 2 +- src/gallium/drivers/freedreno/a4xx/fd4_emit.c | 2 +- src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c | 5 ++--- src/intel/vulkan/genX_cmd_buffer.c | 4 ---- src/intel/vulkan/genX_pipeline.c | 4 +--- 6 files changed, 6 insertions(+), 13 deletions(-) diff --git a/src/compiler/nir/nir_lower_system_values.c b/src/compiler/nir/nir_lower_system_values.c index fb560ee21bb..96643793a70 100644 --- a/src/compiler/nir/nir_lower_system_values.c +++ b/src/compiler/nir/nir_lower_system_values.c @@ -105,7 +105,7 @@ convert_block(nir_block *block, nir_builder *b) if (b->shader->options->vertex_id_zero_based) { sysval = nir_iadd(b, nir_load_vertex_id_zero_base(b), - nir_load_base_vertex(b)); + nir_load_first_vertex(b)); } else { sysval = nir_load_vertex_id(b); } diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_emit.c b/src/gallium/drivers/freedreno/a3xx/fd3_emit.c index b9e1af00e2c..3419ba86d46 100644 --- a/src/gallium/drivers/freedreno/a3xx/fd3_emit.c +++ b/src/gallium/drivers/freedreno/a3xx/fd3_emit.c @@ -374,7 +374,7 @@ fd3_emit_vertex_bufs(struct fd_ringbuffer *ring, struct fd3_emit *emit) continue; if (vp->inputs[i].sysval) { switch(vp->inputs[i].slot) { - case SYSTEM_VALUE_BASE_VERTEX: + case SYSTEM_VALUE_FIRST_VERTEX: /* handled elsewhere */ break; case SYSTEM_VALUE_VERTEX_ID_ZERO_BASE: diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_emit.c b/src/gallium/drivers/freedreno/a4xx/fd4_emit.c index 5fec2b6b08a..42268ceea71 100644 --- a/src/gallium/drivers/freedreno/a4xx/fd4_emit.c +++ b/src/gallium/drivers/freedreno/a4xx/fd4_emit.c @@ -378,7 +378,7 @@ fd4_emit_vertex_bufs(struct fd_ringbuffer *ring, struct fd4_emit *emit) continue; if (vp->inputs[i].sysval) { switch(vp->inputs[i].slot) { - case SYSTEM_VALUE_BASE_VERTEX: + case SYSTEM_VALUE_FIRST_VERTEX: /* handled elsewhere */ break; case SYSTEM_VALUE_VERTEX_ID_ZERO_BASE: diff --git a/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c b/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c index 174141b7fec..356d1bc44ee 100644 --- a/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c +++ b/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c @@ -2182,11 +2182,10 @@ emit_intrinsic(struct ir3_context *ctx, nir_intrinsic_instr *intr) ctx->ir->outputs[n] = src[i]; } break; - case nir_intrinsic_load_base_vertex: + case nir_intrinsic_load_first_vertex: if (!ctx->basevertex) { ctx->basevertex = create_driver_param(ctx, IR3_DP_VTXID_BASE); - add_sysval_input(ctx, SYSTEM_VALUE_BASE_VERTEX, - ctx->basevertex); + add_sysval_input(ctx, SYSTEM_VALUE_FIRST_VERTEX, ctx->basevertex); } dst[0] = ctx->basevertex; break; diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c index 7d190a4d5cf..e945c46dac2 100644 --- a/src/intel/vulkan/genX_cmd_buffer.c +++ b/src/intel/vulkan/genX_cmd_buffer.c @@ -2674,7 +2674,6 @@ void genX(CmdDraw)( genX(cmd_buffer_flush_state)(cmd_buffer); if (vs_prog_data->uses_firstvertex || - vs_prog_data->uses_basevertex || vs_prog_data->uses_baseinstance) emit_base_vertex_instance(cmd_buffer, firstVertex, firstInstance); if (vs_prog_data->uses_drawid) @@ -2714,7 +2713,6 @@ void genX(CmdDrawIndexed)( genX(cmd_buffer_flush_state)(cmd_buffer); if (vs_prog_data->uses_firstvertex || - vs_prog_data->uses_basevertex || vs_prog_data->uses_baseinstance) emit_base_vertex_instance(cmd_buffer, vertexOffset, firstInstance); if (vs_prog_data->uses_drawid) @@ -2855,7 +2853,6 @@ void genX(CmdDrawIndirect)( uint32_t bo_offset = buffer->offset + offset; if (vs_prog_data->uses_firstvertex || - vs_prog_data->uses_basevertex || vs_prog_data->uses_baseinstance) emit_base_vertex_instance_bo(cmd_buffer, bo, bo_offset + 8); if (vs_prog_data->uses_drawid) @@ -2896,7 +2893,6 @@ void genX(CmdDrawIndexedIndirect)( /* TODO: We need to stomp base vertex to 0 somehow */ if (vs_prog_data->uses_firstvertex || - vs_prog_data->uses_basevertex || vs_prog_data->uses_baseinstance) emit_base_vertex_instance_bo(cmd_buffer, bo, bo_offset + 12); if (vs_prog_data->uses_drawid) diff --git a/src/intel/vulkan/genX_pipeline.c b/src/intel/vulkan/genX_pipeline.c index a473f42c7e1..d3af9304ba3 100644 --- a/src/intel/vulkan/genX_pipeline.c +++ b/src/intel/vulkan/genX_pipeline.c @@ -97,7 +97,6 @@ emit_vertex_input(struct anv_pipeline *pipeline, const uint32_t elements_double = double_inputs_read >> VERT_ATTRIB_GENERIC0; const bool needs_svgs_elem = vs_prog_data->uses_vertexid || vs_prog_data->uses_instanceid || - vs_prog_data->uses_basevertex || vs_prog_data->uses_firstvertex || vs_prog_data->uses_baseinstance; @@ -178,8 +177,7 @@ emit_vertex_input(struct anv_pipeline *pipeline, * This means, that if we have BaseInstance, we need BaseVertex as * well. Just do all or nothing. */ - uint32_t base_ctrl = (vs_prog_data->uses_basevertex || - vs_prog_data->uses_firstvertex || + uint32_t base_ctrl = (vs_prog_data->uses_firstvertex || vs_prog_data->uses_baseinstance) ? VFCOMP_STORE_SRC : VFCOMP_STORE_0; -- 2.14.3 _______________________________________________ mesa-dev mailing list <a href="mailto:mesa-dev@lists.freedesktop.org">mesa-dev@lists.freedesktop.org</a> <a href="https://lists.freedesktop.org/mailman/listinfo/mesa-dev" rel="noreferrer" target="_blank">https://lists.freedesktop.org/mailman/listinfo/mesa-dev</a> </blockquote></div> </div>