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<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">This should not have been here at the first place. This patch set is a POC that simd32 gives performance boosts for certain benchmarks. As you said it really
needs clean up and more testing, before it can be merged.<o:p></o:p></span></p>
<p class="MsoNormal"><a name="_MailEndCompose"><o:p> </o:p></a></p>
<p class="MsoNormal">--<o:p></o:p></p>
<p class="MsoNormal">Valtteri<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal"><a name="_____replyseparator"></a><b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif">From:</span></b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif"> mesa-dev [mailto:mesa-dev-bounces@lists.freedesktop.org]
<b>On Behalf Of </b>Jason Ekstrand<br>
<b>Sent:</b> Monday, May 21, 2018 7:24 AM<br>
<b>To:</b> Tang, Shaofeng <shaofeng.tang@intel.com><br>
<b>Cc:</b> ML mesa-dev <mesa-dev@lists.freedesktop.org><br>
<b>Subject:</b> Re: [Mesa-dev] [PATCH 18/47] (0018b) Fix for Patch 0018; I have no idea if this is a real fix or not<o:p></o:p></span></p>
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<p class="MsoNormal">As is evident from patches like this, this series is nowhere near ready for upstream. There's quite a bit of clean up work to do before it will be really ready to merge. I've been working on trying to clean up Francisco's original branch
and sent out the first 19 ready-for-upstream patches on Friday: <a href="https://patchwork.freedesktop.org/series/43450/">
https://patchwork.freedesktop.org/series/43450/</a> I intend to send more later this week once I get a couple of GPU hangs sorted out.<o:p></o:p></p>
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<p class="MsoNormal">--Jason<o:p></o:p></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal">On Sun, May 20, 2018 at 8:29 PM, Shaofeng Tang <<a href="mailto:shaofeng.tang@intel.com" target="_blank">shaofeng.tang@intel.com</a>> wrote:<o:p></o:p></p>
<blockquote style="border:none;border-left:solid #CCCCCC 1.0pt;padding:0cm 0cm 0cm 6.0pt;margin-left:4.8pt;margin-right:0cm">
<p class="MsoNormal">From: Kevin Rogovin <<a href="mailto:kevin.rogovin@intel.com">kevin.rogovin@intel.com</a>><br>
<br>
Change-Id: Ic5948415e0b4d6799b6a88ac507c1999ccb1df39<br>
---<br>
src/intel/compiler/brw_fs.cpp | 6 +++++-<br>
1 file changed, 5 insertions(+), 1 deletion(-)<br>
<br>
diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp<br>
index 121f9f8..b089b79 100644<br>
--- a/src/intel/compiler/brw_fs.cpp<br>
+++ b/src/intel/compiler/brw_fs.cpp<br>
@@ -3349,7 +3349,11 @@ fs_visitor::emit_repclear_shader()<br>
<br>
assign_constant_locations();<br>
assign_curb_setup();<br>
- allocate_registers(16, false);<br>
+ /* WARNING: the original SIMD32 series has this line added, in patch<br>
+ * "i965/fs: Rework FB write header setup for SIMD32 and better scheduling."<br>
+ * but giving this line makes bad things happen later.<br>
+ */<br>
+ // allocate_registers(16, false);<br>
<br>
/* Now that we have the uniform assigned, go ahead and force it to a vec4. */<br>
if (uniforms > 0) {<br>
<span class="hoenzb"><span style="color:#888888">-- </span></span><span style="color:#888888"><br>
<span class="hoenzb">2.7.4</span><br>
<br>
<span class="hoenzb">_______________________________________________</span><br>
<span class="hoenzb">mesa-dev mailing list</span><br>
<span class="hoenzb"><a href="mailto:mesa-dev@lists.freedesktop.org">mesa-dev@lists.freedesktop.org</a></span><br>
<span class="hoenzb"><a href="https://lists.freedesktop.org/mailman/listinfo/mesa-dev" target="_blank">https://lists.freedesktop.org/mailman/listinfo/mesa-dev</a></span></span><o:p></o:p></p>
</blockquote>
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