<div dir="ltr">Ah, that's true, I'll switch them around. Thank you for reviewing Matt!</div> <div class="gmail_quote"><div dir="ltr">On Sat, 2 Jun 2018 at 04:58, Matt Turner <<a href="mailto:mattst88@gmail.com">mattst88@gmail.com</a>> wrote: </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">On Fri, Jun 1, 2018 at 3:21 PM, Plamena Manolova <<a href="mailto:plamena.n.manolova@gmail.com" target="_blank">plamena.n.manolova@gmail.com</a>> wrote: > This patch adds the implentation of ARB_compute_variable_group_size > for i965. We do this by storing the group size in a buffer surface, > similarly to the work group number. > > Signed-off-by: Plamena Manolova <<a href="mailto:plamena.n.manolova@gmail.com" target="_blank">plamena.n.manolova@gmail.com</a>> > --- > docs/features.txt | 2 +- > docs/relnotes/18.2.0.html | 1 + > src/compiler/nir/nir_lower_system_values.c | 14 ++++ > src/intel/compiler/brw_compiler.h | 2 + > src/intel/compiler/brw_fs.cpp | 45 ++++++++---- > src/intel/compiler/brw_fs_nir.cpp | 20 ++++++ > src/intel/compiler/brw_nir_lower_cs_intrinsics.c | 87 +++++++++++++++++------- > src/mesa/drivers/dri/i965/brw_compute.c | 25 ++++++- > src/mesa/drivers/dri/i965/brw_context.h | 1 + > src/mesa/drivers/dri/i965/brw_cs.c | 4 ++ > src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 27 +++++++- > src/mesa/drivers/dri/i965/intel_extensions.c | 1 + > 12 files changed, 187 insertions(+), 42 deletions(-) > > diff --git a/docs/features.txt b/docs/features.txt > index ed4050cf98..7c3c856d73 100644 > --- a/docs/features.txt > +++ b/docs/features.txt > @@ -298,7 +298,7 @@ Khronos, ARB, and OES extensions that are not part of any OpenGL or OpenGL ES ve > > GL_ARB_bindless_texture DONE (nvc0, radeonsi) > GL_ARB_cl_event not started > - GL_ARB_compute_variable_group_size DONE (nvc0, radeonsi) > + GL_ARB_compute_variable_group_size DONE (nvc0, radeonsi, i965) I think these are typically in alphabetical order, so i965 goes first. </blockquote></div>