<div dir="ltr">Have you seen this cause an actual problem?  There's no way we can actually end up with an input array that big...  I guess this is for the crazy OOB case?<br></div><br><div class="gmail_quote"><div dir="ltr">On Wed, Aug 29, 2018 at 3:12 PM Ian Romanick <<a href="mailto:idr@freedesktop.org">idr@freedesktop.org</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">From: Ian Romanick <<a href="mailto:ian.d.romanick@intel.com" target="_blank">ian.d.romanick@intel.com</a>><br>
<br>
Page 190 of "Volume 7: 3D Media GPGPU Engine (Haswell)" says the valid<br>
range of the offset is [0, 0FFFFFFFh].<br>
<br>
Signed-off-by: Ian Romanick <<a href="mailto:ian.d.romanick@intel.com" target="_blank">ian.d.romanick@intel.com</a>><br>
Cc: <a href="mailto:mesa-stable@lists.freedesktop.org" target="_blank">mesa-stable@lists.freedesktop.org</a><br>
Cc: Kenneth Graunke <<a href="mailto:kenneth@whitecape.org" target="_blank">kenneth@whitecape.org</a>><br>
---<br>
 src/intel/compiler/brw_vec4_tes.cpp | 12 +++++++++++-<br>
 1 file changed, 11 insertions(+), 1 deletion(-)<br>
<br>
diff --git a/src/intel/compiler/brw_vec4_tes.cpp b/src/intel/compiler/brw_vec4_tes.cpp<br>
index 35aff0f4b78..cf1bff42aa9 100644<br>
--- a/src/intel/compiler/brw_vec4_tes.cpp<br>
+++ b/src/intel/compiler/brw_vec4_tes.cpp<br>
@@ -185,9 +185,19 @@ vec4_tes_visitor::nir_emit_intrinsic(nir_intrinsic_instr *instr)<br>
          first_component /= 2;<br>
<br>
       if (indirect_offset.file != BAD_FILE) {<br>
+         src_reg clamped_indirect_offset = src_reg(this, glsl_type::uvec4_type);<br>
+<br>
+         /* Page 190 of "Volume 7: 3D Media GPGPU Engine (Haswell)" says the<br>
+          * valid range of the offset is [0, 0FFFFFFFh].<br>
+          */<br>
+         emit_minmax(BRW_CONDITIONAL_L,<br>
+                     dst_reg(clamped_indirect_offset),<br>
+                     retype(indirect_offset, BRW_REGISTER_TYPE_UD),<br>
+                     brw_imm_ud(0x0fffffffu));<br>
+<br>
          header = src_reg(this, glsl_type::uvec4_type);<br>
          emit(TES_OPCODE_ADD_INDIRECT_URB_OFFSET, dst_reg(header),<br>
-              input_read_header, indirect_offset);<br>
+              input_read_header, clamped_indirect_offset);<br>
       } else {<br>
          /* Arbitrarily only push up to 24 vec4 slots worth of data,<br>
           * which is 12 registers (since each holds 2 vec4 slots).<br>
-- <br>
2.14.4<br>
<br>
_______________________________________________<br>
mesa-dev mailing list<br>
<a href="mailto:mesa-dev@lists.freedesktop.org" target="_blank">mesa-dev@lists.freedesktop.org</a><br>
<a href="https://lists.freedesktop.org/mailman/listinfo/mesa-dev" rel="noreferrer" target="_blank">https://lists.freedesktop.org/mailman/listinfo/mesa-dev</a><br>
</blockquote></div>