<div dir="ltr"><div class="gmail_quote"><div dir="ltr">On Fri, Nov 2, 2018 at 5:21 AM Samuel Pitoiset <<a href="mailto:samuel.pitoiset@gmail.com">samuel.pitoiset@gmail.com</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">User are encouraged to switch to LLVM 7.0 released in September 2018.<br>
<br>
Signed-off-by: Samuel Pitoiset <<a href="mailto:samuel.pitoiset@gmail.com" target="_blank">samuel.pitoiset@gmail.com</a>><br>
---<br>
<a href="http://configure.ac" rel="noreferrer" target="_blank">configure.ac</a> | 4 +-<br>
meson.build | 2 +-<br>
src/amd/common/ac_llvm_build.c | 270 +-----------------<br>
src/amd/common/ac_llvm_build.h | 8 +-<br>
src/amd/common/ac_llvm_helper.cpp | 7 -<br>
src/amd/common/ac_llvm_util.c | 19 +-<br>
src/amd/common/ac_nir_to_llvm.c | 24 +-<br>
src/amd/vulkan/radv_cmd_buffer.c | 15 +-<br>
src/amd/vulkan/radv_device.c | 4 +-<br>
src/amd/vulkan/radv_extensions.py | 2 +-<br>
src/amd/vulkan/radv_nir_to_llvm.c | 13 +-<br>
src/amd/vulkan/radv_private.h | 2 +-<br>
src/gallium/drivers/radeonsi/si_descriptors.c | 49 +---<br>
src/gallium/drivers/radeonsi/si_get.c | 9 -<br>
src/gallium/drivers/radeonsi/si_shader.c | 92 +-----<br>
src/gallium/drivers/radeonsi/si_shader.h | 27 --<br>
.../drivers/radeonsi/si_shader_tgsi_alu.c | 47 ++-<br>
.../drivers/radeonsi/si_state_shaders.c | 7 +-<br>
18 files changed, 86 insertions(+), 515 deletions(-)<br>
<br>
diff --git a/<a href="http://configure.ac" rel="noreferrer" target="_blank">configure.ac</a> b/<a href="http://configure.ac" rel="noreferrer" target="_blank">configure.ac</a><br>
index d782f56205..fe63044293 100644<br>
--- a/<a href="http://configure.ac" rel="noreferrer" target="_blank">configure.ac</a><br>
+++ b/<a href="http://configure.ac" rel="noreferrer" target="_blank">configure.ac</a><br>
@@ -107,8 +107,8 @@ dnl LLVM versions<br>
LLVM_REQUIRED_GALLIUM=3.3.0<br>
LLVM_REQUIRED_OPENCL=3.9.0<br>
LLVM_REQUIRED_R600=3.9.0<br>
-LLVM_REQUIRED_RADEONSI=6.0.0<br>
-LLVM_REQUIRED_RADV=6.0.0<br>
+LLVM_REQUIRED_RADEONSI=7.0.0<br>
+LLVM_REQUIRED_RADV=7.0.0<br>
LLVM_REQUIRED_SWR=6.0.0<br>
<br>
dnl Check for progs<br>
diff --git a/meson.build b/meson.build<br>
index 18667988ba..22a9c7bd9a 100644<br>
--- a/meson.build<br>
+++ b/meson.build<br>
@@ -1176,7 +1176,7 @@ if with_gallium_opencl<br>
endif<br>
<br>
if with_amd_vk or with_gallium_radeonsi<br>
- _llvm_version = '>= 6.0.0'<br>
+ _llvm_version = '>= 7.0.0'<br>
elif with_gallium_swr<br>
_llvm_version = '>= 6.0.0'<br>
elif with_gallium_opencl or with_gallium_r600<br>
diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c<br>
index 1392ec0f23..108e37a3e7 100644<br>
--- a/src/amd/common/ac_llvm_build.c<br>
+++ b/src/amd/common/ac_llvm_build.c<br>
@@ -75,7 +75,7 @@ ac_llvm_context_init(struct ac_llvm_context *ctx,<br>
ctx->i16 = LLVMIntTypeInContext(ctx->context, 16);<br>
ctx->i32 = LLVMIntTypeInContext(ctx->context, 32);<br>
ctx->i64 = LLVMIntTypeInContext(ctx->context, 64);<br>
- ctx->intptr = HAVE_32BIT_POINTERS ? ctx->i32 : ctx->i64;<br>
+ ctx->intptr = ctx->i32;<br>
ctx->f16 = LLVMHalfTypeInContext(ctx->context);<br>
ctx->f32 = LLVMFloatTypeInContext(ctx->context);<br>
ctx->f64 = LLVMDoubleTypeInContext(ctx->context);<br>
@@ -1342,99 +1342,28 @@ ac_build_ddxy(struct ac_llvm_context *ctx,<br>
int idx,<br>
LLVMValueRef val)<br>
{<br>
+ unsigned tl_lanes[4], trbl_lanes[4];<br>
LLVMValueRef tl, trbl, args[2];<br>
LLVMValueRef result;<br>
<br>
- if (HAVE_LLVM >= 0x0700) {<br>
- unsigned tl_lanes[4], trbl_lanes[4];<br>
-<br>
- for (unsigned i = 0; i < 4; ++i) {<br>
- tl_lanes[i] = i & mask;<br>
- trbl_lanes[i] = (i & mask) + idx;<br>
- }<br>
-<br>
- tl = ac_build_quad_swizzle(ctx, val,<br>
- tl_lanes[0], tl_lanes[1],<br>
- tl_lanes[2], tl_lanes[3]);<br>
- trbl = ac_build_quad_swizzle(ctx, val,<br>
- trbl_lanes[0], trbl_lanes[1],<br>
- trbl_lanes[2], trbl_lanes[3]);<br>
- } else if (ctx->chip_class >= VI) {<br>
- LLVMValueRef thread_id, tl_tid, trbl_tid;<br>
- thread_id = ac_get_thread_id(ctx);<br>
-<br>
- tl_tid = LLVMBuildAnd(ctx->builder, thread_id,<br>
- LLVMConstInt(ctx->i32, mask, false), "");<br>
-<br>
- trbl_tid = LLVMBuildAdd(ctx->builder, tl_tid,<br>
- LLVMConstInt(ctx->i32, idx, false), "");<br>
-<br>
- args[0] = LLVMBuildMul(ctx->builder, tl_tid,<br>
- LLVMConstInt(ctx->i32, 4, false), "");<br>
- args[1] = val;<br>
- tl = ac_build_intrinsic(ctx,<br>
- "llvm.amdgcn.ds.bpermute", ctx->i32,<br>
- args, 2,<br>
- AC_FUNC_ATTR_READNONE |<br>
- AC_FUNC_ATTR_CONVERGENT);<br>
-<br>
- args[0] = LLVMBuildMul(ctx->builder, trbl_tid,<br>
- LLVMConstInt(ctx->i32, 4, false), "");<br>
- trbl = ac_build_intrinsic(ctx,<br>
- "llvm.amdgcn.ds.bpermute", ctx->i32,<br>
- args, 2,<br>
- AC_FUNC_ATTR_READNONE |<br>
- AC_FUNC_ATTR_CONVERGENT);<br>
- } else {<br>
- uint32_t masks[2] = {};<br>
-<br>
- switch (mask) {<br>
- case AC_TID_MASK_TOP_LEFT:<br>
- masks[0] = 0x8000;<br>
- if (idx == 1)<br>
- masks[1] = 0x8055;<br>
- else<br>
- masks[1] = 0x80aa;<br>
-<br>
- break;<br>
- case AC_TID_MASK_TOP:<br>
- masks[0] = 0x8044;<br>
- masks[1] = 0x80ee;<br>
- break;<br>
- case AC_TID_MASK_LEFT:<br>
- masks[0] = 0x80a0;<br>
- masks[1] = 0x80f5;<br>
- break;<br>
- default:<br>
- assert(0);<br>
- }<br>
-<br>
- args[0] = val;<br>
- args[1] = LLVMConstInt(ctx->i32, masks[0], false);<br>
-<br>
- tl = ac_build_intrinsic(ctx,<br>
- "llvm.amdgcn.ds.swizzle", ctx->i32,<br>
- args, 2,<br>
- AC_FUNC_ATTR_READNONE |<br>
- AC_FUNC_ATTR_CONVERGENT);<br>
-<br>
- args[1] = LLVMConstInt(ctx->i32, masks[1], false);<br>
- trbl = ac_build_intrinsic(ctx,<br>
- "llvm.amdgcn.ds.swizzle", ctx->i32,<br>
- args, 2,<br>
- AC_FUNC_ATTR_READNONE |<br>
- AC_FUNC_ATTR_CONVERGENT);<br>
+ for (unsigned i = 0; i < 4; ++i) {<br>
+ tl_lanes[i] = i & mask;<br>
+ trbl_lanes[i] = (i & mask) + idx;<br>
}<br>
<br>
+ tl = ac_build_quad_swizzle(ctx, val,<br>
+ tl_lanes[0], tl_lanes[1],<br>
+ tl_lanes[2], tl_lanes[3]);<br>
+ trbl = ac_build_quad_swizzle(ctx, val,<br>
+ trbl_lanes[0], trbl_lanes[1],<br>
+ trbl_lanes[2], trbl_lanes[3]);<br>
+<br>
tl = LLVMBuildBitCast(ctx->builder, tl, ctx->f32, "");<br>
trbl = LLVMBuildBitCast(ctx->builder, trbl, ctx->f32, "");<br>
result = LLVMBuildFSub(ctx->builder, trbl, tl, "");<br>
<br>
- if (HAVE_LLVM >= 0x0700) {<br>
- result = ac_build_intrinsic(ctx,<br>
- "llvm.amdgcn.wqm.f32", ctx->f32,<br>
- &result, 1, 0);<br>
- }<br>
+ result = ac_build_intrinsic(ctx, "llvm.amdgcn.wqm.f32", ctx->f32,<br>
+ &result, 1, 0);<br>
<br>
return result;<br>
}<br>
@@ -1679,171 +1608,6 @@ static const char *get_atomic_name(enum ac_atomic_op op)<br>
unreachable("bad atomic op");<br>
}<br>
<br>
-/* LLVM 6 and older */<br>
-static LLVMValueRef ac_build_image_opcode_llvm6(struct ac_llvm_context *ctx,<br>
- struct ac_image_args *a)<br>
-{<br>
- LLVMValueRef args[16];<br>
- LLVMTypeRef retty = ctx->v4f32;<br>
- const char *name = NULL;<br>
- const char *atomic_subop = "";<br>
- char intr_name[128], coords_type[64];<br>
-<br>
- bool sample = a->opcode == ac_image_sample ||<br>
- a->opcode == ac_image_gather4 ||<br>
- a->opcode == ac_image_get_lod;<br>
- bool atomic = a->opcode == ac_image_atomic ||<br>
- a->opcode == ac_image_atomic_cmpswap;<br>
- bool da = a->dim == ac_image_cube ||<br>
- a->dim == ac_image_1darray ||<br>
- a->dim == ac_image_2darray ||<br>
- a->dim == ac_image_2darraymsaa;<br>
- if (a->opcode == ac_image_get_lod)<br>
- da = false;<br>
-<br>
- unsigned num_coords =<br>
- a->opcode != ac_image_get_resinfo ? ac_num_coords(a->dim) : 0;<br>
- LLVMValueRef addr;<br>
- unsigned num_addr = 0;<br>
-<br>
- if (a->opcode == ac_image_get_lod) {<br>
- switch (a->dim) {<br>
- case ac_image_1darray:<br>
- num_coords = 1;<br>
- break;<br>
- case ac_image_2darray:<br>
- case ac_image_cube:<br>
- num_coords = 2;<br>
- break;<br>
- default:<br>
- break;<br>
- }<br>
- }<br>
-<br>
- if (a->offset)<br>
- args[num_addr++] = ac_to_integer(ctx, a->offset);<br>
- if (a->bias)<br>
- args[num_addr++] = ac_to_integer(ctx, a->bias);<br>
- if (a->compare)<br>
- args[num_addr++] = ac_to_integer(ctx, a->compare);<br>
- if (a->derivs[0]) {<br>
- unsigned num_derivs = ac_num_derivs(a->dim);<br>
- for (unsigned i = 0; i < num_derivs; ++i)<br>
- args[num_addr++] = ac_to_integer(ctx, a->derivs[i]);<br>
- }<br>
- for (unsigned i = 0; i < num_coords; ++i)<br>
- args[num_addr++] = ac_to_integer(ctx, a->coords[i]);<br>
- if (a->lod)<br>
- args[num_addr++] = ac_to_integer(ctx, a->lod);<br>
-<br>
- unsigned pad_goal = util_next_power_of_two(num_addr);<br>
- while (num_addr < pad_goal)<br>
- args[num_addr++] = LLVMGetUndef(ctx->i32);<br>
-<br>
- addr = ac_build_gather_values(ctx, args, num_addr);<br>
-<br>
- unsigned num_args = 0;<br>
- if (atomic || a->opcode == ac_image_store || a->opcode == ac_image_store_mip) {<br>
- args[num_args++] = a->data[0];<br>
- if (a->opcode == ac_image_atomic_cmpswap)<br>
- args[num_args++] = a->data[1];<br>
- }<br>
-<br>
- unsigned coords_arg = num_args;<br>
- if (sample)<br>
- args[num_args++] = ac_to_float(ctx, addr);<br>
- else<br>
- args[num_args++] = ac_to_integer(ctx, addr);<br>
-<br>
- args[num_args++] = a->resource;<br>
- if (sample)<br>
- args[num_args++] = a->sampler;<br>
- if (!atomic) {<br>
- args[num_args++] = LLVMConstInt(ctx->i32, a->dmask, 0);<br>
- if (sample)<br>
- args[num_args++] = LLVMConstInt(ctx->i1, a->unorm, 0);<br>
- args[num_args++] = a->cache_policy & ac_glc ? ctx->i1true : ctx->i1false;<br>
- args[num_args++] = a->cache_policy & ac_slc ? ctx->i1true : ctx->i1false;<br>
- args[num_args++] = ctx->i1false; /* lwe */<br>
- args[num_args++] = LLVMConstInt(ctx->i1, da, 0);<br>
- } else {<br>
- args[num_args++] = ctx->i1false; /* r128 */<br>
- args[num_args++] = LLVMConstInt(ctx->i1, da, 0);<br>
- args[num_args++] = a->cache_policy & ac_slc ? ctx->i1true : ctx->i1false;<br>
- }<br>
-<br>
- switch (a->opcode) {<br>
- case ac_image_sample:<br>
- name = "llvm.amdgcn.image.sample";<br>
- break;<br>
- case ac_image_gather4:<br>
- name = "llvm.amdgcn.image.gather4";<br>
- break;<br>
- case ac_image_load:<br>
- name = "llvm.amdgcn.image.load";<br>
- break;<br>
- case ac_image_load_mip:<br>
- name = "llvm.amdgcn.image.load.mip";<br>
- break;<br>
- case ac_image_store:<br>
- name = "llvm.amdgcn.image.store";<br>
- retty = ctx->voidt;<br>
- break;<br>
- case ac_image_store_mip:<br>
- name = "llvm.amdgcn.image.store.mip";<br>
- retty = ctx->voidt;<br>
- break;<br>
- case ac_image_atomic:<br>
- case ac_image_atomic_cmpswap:<br>
- name = "llvm.amdgcn.image.atomic.";<br>
- retty = ctx->i32;<br>
- if (a->opcode == ac_image_atomic_cmpswap) {<br>
- atomic_subop = "cmpswap";<br>
- } else {<br>
- atomic_subop = get_atomic_name(a->atomic);<br>
- }<br>
- break;<br>
- case ac_image_get_lod:<br>
- name = "llvm.amdgcn.image.getlod";<br>
- break;<br>
- case ac_image_get_resinfo:<br>
- name = "llvm.amdgcn.image.getresinfo";<br>
- break;<br>
- default:<br>
- unreachable("invalid image opcode");<br>
- }<br>
-<br>
- ac_build_type_name_for_intr(LLVMTypeOf(args[coords_arg]), coords_type,<br>
- sizeof(coords_type));<br>
-<br>
- if (atomic) {<br>
- snprintf(intr_name, sizeof(intr_name), "llvm.amdgcn.image.atomic.%s.%s",<br>
- atomic_subop, coords_type);<br>
- } else {<br>
- bool lod_suffix =<br>
- a->lod && (a->opcode == ac_image_sample || a->opcode == ac_image_gather4);<br>
-<br>
- snprintf(intr_name, sizeof(intr_name), "%s%s%s%s.v4f32.%s.v8i32",<br>
- name,<br>
- a->compare ? ".c" : "",<br>
- a->bias ? ".b" :<br>
- lod_suffix ? ".l" :<br>
- a->derivs[0] ? ".d" :<br>
- a->level_zero ? ".lz" : "",<br>
- a->offset ? ".o" : "",<br>
- coords_type);<br>
- }<br>
-<br>
- LLVMValueRef result =<br>
- ac_build_intrinsic(ctx, intr_name, retty, args, num_args,<br>
- a->attributes);<br>
- if (!sample && retty == ctx->v4f32) {<br>
- result = LLVMBuildBitCast(ctx->builder, result,<br>
- ctx->v4i32, "");<br>
- }<br>
- return result;<br>
-}<br>
-<br>
LLVMValueRef ac_build_image_opcode(struct ac_llvm_context *ctx,<br>
struct ac_image_args *a)<br>
{<br>
@@ -1868,9 +1632,6 @@ LLVMValueRef ac_build_image_opcode(struct ac_llvm_context *ctx,<br>
(a->level_zero ? 1 : 0) +<br>
(a->derivs[0] ? 1 : 0) <= 1);<br>
<br>
- if (HAVE_LLVM < 0x0700)<br>
- return ac_build_image_opcode_llvm6(ctx, a);<br>
-<br>
if (a->opcode == ac_image_get_lod) {<br>
switch (dim) {<br>
case ac_image_1darray:<br>
@@ -2659,9 +2420,6 @@ LLVMTypeRef ac_array_in_const_addr_space(LLVMTypeRef elem_type)<br>
<br>
LLVMTypeRef ac_array_in_const32_addr_space(LLVMTypeRef elem_type)<br>
{<br>
- if (!HAVE_32BIT_POINTERS)<br>
- return ac_array_in_const_addr_space(elem_type);<br>
-<br>
return LLVMPointerType(LLVMArrayType(elem_type, 0),<br>
AC_ADDR_SPACE_CONST_32BIT);<br>
}<br>
diff --git a/src/amd/common/ac_llvm_build.h b/src/amd/common/ac_llvm_build.h<br>
index 1275e4fb69..26399b7832 100644<br>
--- a/src/amd/common/ac_llvm_build.h<br>
+++ b/src/amd/common/ac_llvm_build.h<br>
@@ -34,14 +34,12 @@<br>
extern "C" {<br>
#endif<br>
<br>
-#define HAVE_32BIT_POINTERS (HAVE_LLVM >= 0x0700)<br>
-<br>
enum {<br>
- AC_ADDR_SPACE_FLAT = HAVE_LLVM >= 0x0700 ? 0 : 4, /* Slower than global. */<br>
+ AC_ADDR_SPACE_FLAT = 0, /* Slower than global. */<br>
AC_ADDR_SPACE_GLOBAL = 1,<br>
- AC_ADDR_SPACE_GDS = HAVE_LLVM >= 0x0700 ? 2 : 5,<br>
+ AC_ADDR_SPACE_GDS = 2,<br>
AC_ADDR_SPACE_LDS = 3,<br>
- AC_ADDR_SPACE_CONST = HAVE_LLVM >= 0x0700 ? 4 : 2, /* Global allowing SMEM. */<br>
+ AC_ADDR_SPACE_CONST = 4, /* Global allowing SMEM. */<br>
AC_ADDR_SPACE_CONST_32BIT = 6, /* same as CONST, but the pointer type has 32 bits */<br>
};<br>
<br>
diff --git a/src/amd/common/ac_llvm_helper.cpp b/src/amd/common/ac_llvm_helper.cpp<br>
index e022e12c7f..dcfb800854 100644<br>
--- a/src/amd/common/ac_llvm_helper.cpp<br>
+++ b/src/amd/common/ac_llvm_helper.cpp<br>
@@ -39,9 +39,6 @@<br>
#include <llvm/Transforms/IPO.h><br>
<br>
#include <llvm/IR/LegacyPassManager.h><br>
-#if HAVE_LLVM < 0x0700<br>
-#include "llvm/Support/raw_ostream.h"<br>
-#endif<br>
<br>
void ac_add_attr_dereferenceable(LLVMValueRef val, uint64_t bytes)<br>
{<br>
@@ -132,9 +129,7 @@ struct ac_compiler_passes *ac_create_llvm_passes(LLVMTargetMachineRef tm)<br>
llvm::TargetMachine *TM = reinterpret_cast<llvm::TargetMachine*>(tm);<br>
<br>
if (TM->addPassesToEmitFile(p->passmgr, p->ostream,<br>
-#if HAVE_LLVM >= 0x0700<br>
nullptr,<br>
-#endif<br>
llvm::TargetMachine::CGFT_ObjectFile)) {<br>
fprintf(stderr, "amd: TargetMachine can't emit a file of this type!\n");<br>
delete p;<br>
@@ -170,7 +165,5 @@ void ac_llvm_add_barrier_noop_pass(LLVMPassManagerRef passmgr)<br>
<br>
void ac_enable_global_isel(LLVMTargetMachineRef tm)<br>
{<br>
-#if HAVE_LLVM >= 0x0700<br>
reinterpret_cast<llvm::TargetMachine*>(tm)->setGlobalISel(true);<br>
-#endif<br>
}<br>
diff --git a/src/amd/common/ac_llvm_util.c b/src/amd/common/ac_llvm_util.c<br>
index 69d9f7b9f3..0c8565f95a 100644<br>
--- a/src/amd/common/ac_llvm_util.c<br>
+++ b/src/amd/common/ac_llvm_util.c<br>
@@ -30,9 +30,7 @@<br>
#include <llvm-c/Support.h><br>
#include <llvm-c/Transforms/IPO.h><br>
#include <llvm-c/Transforms/Scalar.h><br>
-#if HAVE_LLVM >= 0x0700<br>
#include <llvm-c/Transforms/Utils.h><br>
-#endif<br>
#include "c11/threads.h"<br>
#include "gallivm/lp_bld_misc.h"<br>
#include "util/u_math.h"<br>
@@ -132,9 +130,9 @@ const char *ac_get_llvm_processor_name(enum radeon_family family)<br>
case CHIP_RAVEN:<br>
return "gfx902";<br>
case CHIP_VEGA12:<br>
- return HAVE_LLVM >= 0x0700 ? "gfx904" : "gfx902";<br>
+ return "gfx904";<br>
case CHIP_VEGA20:<br>
- return HAVE_LLVM >= 0x0700 ? "gfx906" : "gfx902";<br>
+ return "gfx906";<br>
case CHIP_RAVEN2:<br>
return "gfx902"; /* TODO: use gfx909 when it's available */<br>
default:<br>
@@ -323,12 +321,10 @@ ac_init_llvm_compiler(struct ac_llvm_compiler *compiler,<br>
goto fail;<br>
}<br>
<br>
- if (okay_to_leak_target_library_info || (HAVE_LLVM >= 0x0700)) {<br>
- compiler->target_library_info =<br>
- ac_create_target_library_info(triple);<br>
- if (!compiler->target_library_info)<br>
- goto fail;<br>
- }<br>
+ compiler->target_library_info =<br>
+ ac_create_target_library_info(triple);<br>
+ if (!compiler->target_library_info)<br>
+ goto fail;<br></blockquote><div><br></div><div>You can also remove the "okay_to_leak_target_library_info" parameter. Other than that:</div><div><br></div><div>Reviewed-by: Marek Olšák <<a href="mailto:marek.olsak@amd.com">marek.olsak@amd.com</a>></div><div><br></div><div>Marek</div></div></div>